* Team Lead for IBM's PCI Express Verification IP (VIP) Portfolio used to successfully verify many IBM microprocessor, ASIC and gaming chips across the globe.* Architected and implemented various PCIe verification bus functional models, drivers, checkers, monitors, and debug solutions for IBM pre-silicon verification and post-silicon validation teams.* PCIe VIP supports industry standard PCIe (e.g. PCIe Gen1-5, ECNs, etc.) as well as custom IBM-proprietary usages of PCIe.* PCIe VIP development requiring strong SW engineering skills (C++, PERL, Linux/AIX, etc) and HW engineering skills (VHDL/Verilog design/debug, HW verification, etc.)* Work closely with customers (IO Verification Engineers) to define and deliver effective end-to-end PCIe verification solutions.* Effectively lead and manage remote team of engineers.* Provide PCIe consulting to fellow IBMers.

* Developed and supported IBM’s VHDL and Verilog compiler used in IBM’s microprocessor design and verifcation methodology.* Specific enhancements to VHDL/Verilog compiler include adding Verilog 2001 support (generate statements, multi-dimensional arrays, etc.), register splitting algorithms, and mixed VHDL/Verilog support.* Compiler written in C++ thus requiring extensive C++ design, compile, debug (DDD, Valgrind, etc.) skills as well as deep understanding of VHDL/Verilog language.

Instructor for Computer Engineering lab courses:* Assembly Language Programming* Introduction to Digital Systems* Digital Systems Design* Hardware Description Language* Freshman Mentoring Lab

* Developed software for the automatic and pseudo-random generation of test scripts to be run on the software simulation model of the Alpha EV7 memory, cache, and I/O routing units using SEGUE testcase generation language.* Continued implementation and debugging of Alpha EV7 on-chip-logic-analyzer verification software using C++ in UNIX environment.

Developed new features for Compaq Circuit Simulation & Verification department's in-house full-custom static timing verification tool suite “Ztools” for Alpha EV7 and Alpha EV8 using C++ in UNIX environment. Features included the recognition of identical pieces of CMOS logic in order to reuse delay information and thus speed up tool performance when identifying static timing analysis violations.

* Developed new features to Microsoft Windows-based security management software “OnGuard” utilizing Visual C++, MFC, Win32 API and Installshield in Windows environment.* Created functional specification and test documentation for various software and hardware components.