Rich Harries

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Sr Staff Engineer Silicon Backend Analysis Team
Rich Harries's Location
Chandler, Arizona, United States, United States
Rich Harries's Contact Details

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n/a
About Rich Harries

Rich Harries is a Sr Staff Engineer Silicon Backend Analysis Team.

Rich Harries's Current Company Details

Sr Staff Engineer Silicon Backend Analysis Team
Rich Harries Work Experience Details
  • Intel Corporation
    Sr Staff Engineer Silicon Backend Analysis Team
    Intel Corporation Nov 2016 - Mar 2017
    Phoenix, Arizona Area
    Member of silicon design team responsible for analysis of mechanical failure modes in the backend of the silicon die. Primary used of in house codes based on python and finite element analysis used to conduct design studies throughout the entire silicon design process. Currently focusing on backend design layout impacts, via stack orientation optimization, and ILD protection.
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  • Intel Corporation
    Sr Staff Engineer Pathfinding Projects
    Intel Corporation Jun 2014 - Oct 2016
    Phoenix, Arizona Area
    Provide all mechanical guidance for package design for packages aligned to Intel's pathfinding roadmap primarily utilizing finite element analysis. Primarily utilized finite element analysis to optimize design of packages before fabrication, assist in design of test vehicles, and optimize material choices to enable design of robust packages to meet customer requirements.
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  • Intel Corporation
    Mechanical Core Compentency Manager
    Intel Corporation Jul 2008 - Jun 2014
    Phoenix, Arizona Area
    Managed team that was responsible for mechanical development of robust package designs from pathfinding all the way through to product technology certification. Members of the group utilize finite element analysis to help guide the design of all mechanical aspects of the electronic package during its design cycle.
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  • Intel
    Sr. Packaging Engineer
    Intel Feb 2000 - Jul 2008
    Electronic Packaging engineer responsible for mechanical design of electronic packages through development to technology certification. In this role utilized finite element analysis to identify and resolve mechanical driven failure modes, optimize material choices in the package, and insure design of robust electronic packaging systems subject to temperature cycle, shock, and vibration related reliability stresses.
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  • Exponent
    Failure Analysis Engineer
    Exponent May 1998 - Feb 2000
    Structural failure analysis consultant specializing in using finite element analysis to help external companies with design of biomedical devices (stents, and liver shunts), engine mold frames for automotive industry, truck bed frames for NY city garbage trucks as well Chiquita Bannana and, and retrofitting of buildings for earthquake protection using moment frame connection joints.
  • Motorola
    Packaging Engineer
    Motorola Oct 1994 - Oct 1996
    Electronic packaging engineer specializing in the design of pressure and air bag deployment MEMS sensors. Utilized finite element analysis to optimize design of these products. In addition, spent three months working in MEMS wafer fabrication facility learning all of the manufacturing steps of these devices
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Rich Harries Skills

Design Of Experiments Electronics Packaging Semiconductors Finite Element Analysis Jmp Failure Analysis Engineering Management Abaqus Ansys Mems Thin Films Simulations

Rich Harries Education Details

Frequently Asked Questions about Rich Harries

What is Rich Harries's role at the current company?

Rich Harries's current role is Sr Staff Engineer Silicon Backend Analysis Team.

What is Rich Harries's email address?

Rich Harries's email address is ri****@****tel.com

What schools did Rich Harries attend?

Rich Harries attended Georgia Institute Of Technology.

What skills is Rich Harries known for?

Rich Harries has skills like Design Of Experiments, Electronics Packaging, Semiconductors, Finite Element Analysis, Jmp, Failure Analysis, Engineering Management, Abaqus, Ansys, Mems, Thin Films, Simulations.

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