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Giacomo Rinaldi Email & Phone Number
Cofounder and VP of Engineering
at
Chronos Tech
1 work email found
@chronostech.com
1 phone found area 602
LinkedIn matched
4 data sources
Profile completeness 100%
Current company
Role
Cofounder and VP of Engineering
Location
San Diego, California, United States
Company size
Who is Giacomo Rinaldi? Overview
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Quick answer
Giacomo Rinaldi is listed as Cofounder and VP of Engineering at Chronos Tech, a company with 7 employees, based in San Diego, California, United States. AeroLeads shows a work email signal at chronostech.com, phone signal with area code 602, and a matched LinkedIn profile for Giacomo Rinaldi.
Giacomo Rinaldi previously worked as VP of Enginnering at Chronos Tech and Project Lead and Architect at Intel. Giacomo Rinaldi holds Msee, Telecommunication Technology from Università Degli Studi Di Firenze.
Company email context
Email format at Chronos Tech
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{first}@chronostech.com
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AeroLeads found 1 current-domain work email signal for Giacomo Rinaldi. Compare company email patterns before reaching out.
Profile bio
About Giacomo Rinaldi
Giacomo has years of proven experience in analog mixed signal design with focus on high speed links. Before joining Chronos Tech, Giacomo was project lead and architect at Intel Custom Foundry working on the latest ultra-high speed multi-standard Serdes in FinFET technology. Giacomo’s breadth of expertise, from architectural definition to high volume manufacturing, are the result of his direct involvement in all aspects of the product life cycle of a chip, having successfully taped out multiple products in BiCMOS, planar and FinFET CMOS technology. Giacomo has a Laurea Doctorate degree in Electrical Engineering and an MBA. He is also the inventor of various US Patent on the electrical field.
Listed skills include Mixed Signal, Soc, Cmos, Ic, and 23 others.
Current workplace
Giacomo Rinaldi's current company
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Chronos Tech
7 roles
Giacomo Rinaldi work experience
A career timeline built from the work history available for this profile.
Vp Of Enginnering
Current
Jun 2015 - Present
Project Lead And Architect
Part of Intel Custom Foundry I have covered various leading role in the Analog IP path-finding and Serdes group from architecture to production release in fin-FET technology. Specific projects and details cannot be disclose at this time. Responsible for the Production Release Qualification of the 45nm server chipset. Engaged in all the PRQ activity.
Nov 2010 - May 2015
Chip Lead And Architect
Chip-Lead responsible of system level architecture and design/layout of a quad Backplane EQ/Cable EQ/Re-Clocker/Cable Driver for HD3G/HD/SD video application in 0.13u CMOS TSMC technology.Responsible of design/layout and top level chip integration of various blocks of a 16x16 DC to 11.5Gbps Crosspoint/Signal Conditioner in 0.18u SiGe IBM technology.
Sep 2008 - Nov 2010
Staff Analog Design Engineer
Transmitter Lead and architect for two projects: PCIe Gen III (8Gbps) and SAS/SATA (6Gbps) in 45 nm CMOS technology.Successfully taped-out and tested a 6Gbps SAS/SATA PHY hard macro in 90nm CMOS technology.Member of the serial PHY development design team for high speed serial interface applications such as PCIe, SAS and SATA.Responsible for the.
Aug 2005 - Sep 2008
Analog Design Engineer
Projects that were brought to completion and successful tape-out were: (1) A Fast-Ethernet PHY IP: 0.18um process(2) PPECL/LVDS pad 0.18um and 0.13um process(3) PCI-Express PHY IP 0.13um and 90nm(4) SATA 3G Transmitter 90nm
May 2001 - Aug 2005
Hw/Sw Engineer
HW/SW Engineer responsible of developing communication layer for medical application.
Jul 2000 - May 2001
2 education records
Giacomo Rinaldi education
Msee, Telecommunication Technology
Università Degli Studi Di Firenze
Mba, General Management
University Of Phoenix
FAQ
Frequently asked questions about Giacomo Rinaldi
Quick answers generated from the profile data available on this page.
What company does Giacomo Rinaldi work for?
Giacomo Rinaldi works for Chronos Tech.
What is Giacomo Rinaldi's role at Chronos Tech?
Giacomo Rinaldi is listed as Cofounder and VP of Engineering at Chronos Tech.
What is Giacomo Rinaldi's email address?
AeroLeads has found 1 work email signal at @chronostech.com for Giacomo Rinaldi at Chronos Tech.
What is Giacomo Rinaldi's phone number?
AeroLeads has found 1 phone signal(s) with area code 602 for Giacomo Rinaldi at Chronos Tech.
Where is Giacomo Rinaldi based?
Giacomo Rinaldi is based in San Diego, California, United States while working with Chronos Tech.
What companies has Giacomo Rinaldi worked for?
Giacomo Rinaldi has worked for Chronos Tech, Intel, Vitesse Semiconductor, Stmicroelectronics, and Esaote.
Who are Giacomo Rinaldi's colleagues at Chronos Tech?
Giacomo Rinaldi's colleagues at Chronos Tech include Akbar Shokouhi.
How can I contact Giacomo Rinaldi?
You can use AeroLeads to view verified contact signals for Giacomo Rinaldi at Chronos Tech, including work email, phone, and LinkedIn data when available.
What schools did Giacomo Rinaldi attend?
Giacomo Rinaldi holds Msee, Telecommunication Technology from Università Degli Studi Di Firenze.
What skills is Giacomo Rinaldi known for?
Giacomo Rinaldi is listed with skills including Mixed Signal, Soc, Cmos, Ic, Analog Circuit Design, Analog, Semiconductors, and Verilog.
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