Sep 2023 - Present
AeroLeads people directory · profile
Ritesh Jain Email & Phone Number
Senior Vice President at Lightmatter
at
Lightmatter
1 work email found
@intel.com
LinkedIn matched
4 data sources
Profile completeness 100%
Current company
Role
Senior Vice President at Lightmatter
Location
Mountain View, California, United States
Who is Ritesh Jain? Overview
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Quick answer
Ritesh Jain is listed as Senior Vice President at Lightmatter at Lightmatter, based in Mountain View, California, United States. AeroLeads shows a work email signal at intel.com and a matched LinkedIn profile for Ritesh Jain.
Ritesh Jain previously worked as Senior Vice President at Lightmatter and Vice President Of Engineering at Lightmatter. Ritesh Jain holds Ms, Electronic Packaging, Mechanical Engineering from University Of Maryland.
Company email context
Email format at Lightmatter
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{first}.{last}@intel.com
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AeroLeads found 1 current-domain work email signal for Ritesh Jain. Compare company email patterns before reaching out.
Profile bio
About Ritesh Jain
Industry leader with a long standing experience in hardware engineering for data center products
Listed skills include Engineering Management, Semiconductors, Soc, Engineering, and 40 others.
Current workplace
Ritesh Jain's current company
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9 roles
Ritesh Jain work experience
A career timeline built from the work history available for this profile.
Vice President Of Engineering
Aug 2022 - Sep 2023
Vice President Of Engineering
Vice President (Data Center AI Group) & Director of the Component Hardware Engineering Division responsible for directing the development of datacenter CPUs, GPUs, & AI accelerators for the packaging, power integrity/delivery, signal integrity & thermal-mechanical solutions across a ~$20B revenue businessEngineering Executive for the next-gen Xeon platform.
Jan 2020 - Aug 2022
Sr. Director Of Engineering
- Sr. Director of the Datacenter Component Engineering group responsible for the design and development of all datacenter silicon-packages, the thermal & mechanical solutions for all datacenter components and the power.
- Built & led the DCE organization (250+ employees) with the goal to create scalable solutions for DCG’s customers for all Xeon® & Nervana® products
- Directed the development of component HW solutions for Intel’s next-gen compute, AI & graphics products
- Direct engagement with several Cloud Service Provider customers to enable direct innovation via custom solutions
Aug 2018 - Jan 2020
Sr. Director Of Engineering
- Sr. Director of the Datacenter Power and Package Solutions group responsible for the design and development of all datacenter silicon-packages and the power delivery and power integrity solutions for all datacenter.
- Built & led the DPPS organization (160+ employees) from a packaging, power integrity & delivery standpoint for all Xeon® products
- Co-architected & led the component HW execution of the Xeon® Cascade Lake – AP product for DCG’s “Advanced Performance” segment
Oct 2016 - Aug 2018
Director Of Engineering
- Leading the Platform and Package Engineering Organization that supports the Platform engineering leadership and the Silicon-Packaging for all Datacenter Platforms and CPU, Chipset & SoC silicon ingredients.
- Led/Directed the development of over 60 silicon-package designs across DCG’s CPU & Chipset products including Xeon® Phi™, Xeon® E7/E5/E3, Xeon® D & Intel® Atom
- Led the intercept of Intel’s 1st PoINT® based packaging architecture for the Xeon® E5 family of products
- Led the implementation of Intel’s 1st FIVR designs for Xeon® E7/E5 & D family of products
- Engaged in DCG’s Next-Gen Product Development & Delivery initiative and developed the “Derivative Development” methodology for quick-turn product development
- Served as DCG’s “Cost Czar” and drove >$500M in savings across the product BOM, test & manufacturing costs
Apr 2012 - Oct 2016
Engineering Manager
- Managed the Silicon-Package design teams in the Datacenter & Connected Systems Group (DCSG) that supported all DCSG's CPU, chipset and other silicon ingredients.
- Drove several cross-functional efficiency initiatives and effort reduction across multiple generations of products
- Forged key relationships with stakeholders across silicon design, technology development, manufacturing & test
- Developed a cross-functional platform engineering & technology engagement model and product design methodology
Apr 2006 - Apr 2012
Sr. Packaging Engineer
- Led the Silicon-Package design for various CPU, chipset and other silicon ingredients in the Server Products Group.
- Developed 10+ Xeon® CPU & chipset silicon-packages including Intel’s 1st Integrated Memory Controller CPU: Nehalem
Jan 2001 - Apr 2006
Ic Packaging Engineer
- Supported the package design for various automotive components including smart connectors and other automotive modules
- Lead Engineer on the “Smart” Connector program developing IC packages for smart switches & controllers resulting in the reduction of the wiring harness in automobiles
- Project Engineer on the Gen-III Ignition Control Module supporting the design modification of the module for a 20% reduction in product cost. Conducted reliability & qualification testing of the ignition module.
Jun 1998 - Jan 2001
3 education records
Ritesh Jain education
Ms, Electronic Packaging, Mechanical Engineering
University Of Maryland
B.Tech, Engineering
Indian Institute Of Technology, Madras
Education record
St. Patrick'S High School, Secunderabad
FAQ
Frequently asked questions about Ritesh Jain
Quick answers generated from the profile data available on this page.
What company does Ritesh Jain work for?
Ritesh Jain works for Lightmatter.
What is Ritesh Jain's role at Lightmatter?
Ritesh Jain is listed as Senior Vice President at Lightmatter at Lightmatter.
What is Ritesh Jain's email address?
AeroLeads has found 1 work email signal at @intel.com for Ritesh Jain at Lightmatter.
Where is Ritesh Jain based?
Ritesh Jain is based in Mountain View, California, United States while working with Lightmatter.
What companies has Ritesh Jain worked for?
Ritesh Jain has worked for Lightmatter, Intel Corporation, and Delphi Automotive Systems.
How can I contact Ritesh Jain?
You can use AeroLeads to view verified contact signals for Ritesh Jain at Lightmatter, including work email, phone, and LinkedIn data when available.
What schools did Ritesh Jain attend?
Ritesh Jain holds Ms, Electronic Packaging, Mechanical Engineering from University Of Maryland.
What skills is Ritesh Jain known for?
Ritesh Jain is listed with skills including Engineering Management, Semiconductors, Soc, Engineering, Asic, Processors, Ic, and Cross Functional Team Leadership.
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