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Ram Gupta Email & Phone Number

ASIC Development at Meta Platforms, Inc. at Meta
Location: Fremont, California, United States 6 work roles 2 schools
1 work email found @qualcomm.com 1 phone found area 858 LinkedIn matched
✓ Verified Jun 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email · 1 phone

Work email r****@qualcomm.com
Direct phone (858) ***-****
LinkedIn Profile matched
3 free lookups remaining · No credit card
Current company
Role
ASIC Development at Meta Platforms, Inc.
Location
Fremont, California, United States

Who is Ram Gupta? Overview

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Quick answer

Ram Gupta is listed as ASIC Development at Meta Platforms, Inc. at Meta, based in Fremont, California, United States. AeroLeads shows a work email signal at qualcomm.com, phone signal with area code 858, and a matched LinkedIn profile for Ram Gupta.

Ram Gupta previously worked as Senior Manager, ASIC Physical Design at Meta and Senior Staff Engineering Manager at Qualcomm. Ram Gupta holds Master Degree, Vlsi from National Institute Of Technology, Tiruchirappalli.

Company email context

Email format at Meta

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{first_initial}{last}@qualcomm.com
86% confidence

AeroLeads found 1 current-domain work email signal for Ram Gupta. Compare company email patterns before reaching out.

Profile bio

About Ram Gupta

• Hands-on experience in physical design and tape-out of complex SoC and ASICs targeted for data center, embedded processors and network connectivity applications.• Developed methodologies to achieve better Performance, Power & Area, streamline hierarchical implementation and faster turnaround time.• Proven success managing, growing and leading teams in the US, India and Vietnam.• Experience delivering in both large global organizations and fast-moving start-up environments.

Listed skills include Static Timing Analysis, Physical Design, Asic, Ic, and 14 others.

Current workplace

Ram Gupta's current company

Company context helps verify the profile and gives searchers a useful next step.

Meta
Meta
ASIC Development at Meta Platforms, Inc.
AeroLeads page
6 roles

Ram Gupta work experience

A career timeline built from the work history available for this profile.

Senior Manager, Asic Physical Design

Current

Menlo Park, CA, US

Sep 2018 - Present

Senior Staff Engineering Manager

San Diego, CA, US

Apr 2015 - Sep 2018

Engineering Manager

Santa Clara, CA, US

Processor and SoC Physical Design

Jun 2011 - Apr 2015

Senior Staff Design Engineer

Santa Clara, CA, US

Processor and SoC Physical Design expert

Apr 2008 - Jun 2011

Lead Asic Design Engineer

Bangalore, Karnataka, IN

Physical Design.

Apr 2005 - Nov 2007

Hardware Engineer

San Jose, CA, US

Physical Design, DFT, Board STA.

Sep 2000 - Apr 2005
2 education records

Ram Gupta education

Master Degree, Vlsi

National Institute Of Technology, Tiruchirappalli

Engineering, Electronics & Instrumentation

Sgsits Indore Mp India
FAQ

Frequently asked questions about Ram Gupta

Quick answers generated from the profile data available on this page.

What company does Ram Gupta work for?

Ram Gupta works for Meta.

What is Ram Gupta's role at Meta?

Ram Gupta is listed as ASIC Development at Meta Platforms, Inc. at Meta.

What is Ram Gupta's email address?

AeroLeads has found 1 work email signal at @qualcomm.com for Ram Gupta at Meta.

What is Ram Gupta's phone number?

AeroLeads has found 1 phone signal(s) with area code 858 for Ram Gupta at Meta.

Where is Ram Gupta based?

Ram Gupta is based in Fremont, California, United States while working with Meta.

What companies has Ram Gupta worked for?

Ram Gupta has worked for Meta, Qualcomm, Appliedmicro, Open Silicon, and Cisco Systems.

How can I contact Ram Gupta?

You can use AeroLeads to view verified contact signals for Ram Gupta at Meta, including work email, phone, and LinkedIn data when available.

What schools did Ram Gupta attend?

Ram Gupta holds Master Degree, Vlsi from National Institute Of Technology, Tiruchirappalli.

What skills is Ram Gupta known for?

Ram Gupta is listed with skills including Static Timing Analysis, Physical Design, Asic, Ic, Eda, Timing Closure, Vlsi, and Tcl.

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