Rob Crow Email & Phone Number

Mountain View, CA, US

Cupertino, California, US

Cupertino, California, US

Cupertino, California, US

Cupertino, California, US

Boise, Idaho, US

Worked on 4Gbit DDR3 part type, performing initial design verification using both analog and digital simulation tools. Helped to coordinate with Fabrication, Probe, and Test groups information to start production testing.

Boise, Idaho, US

Virginia Fabrication Site contact for Boise DRAM and NAND product engineering groups. Worked with Process Integration, Product Yield Enhancement, and Wafer Level Probing groups for controlling quality and yields. Coordinating disposition of both qualified and deviated material which required process and electrical knowledge of all current production.

Boise, Idaho, US

Maintained hsim, hspice and verilog simulation environments for Product Engineering groups; including debugging all design/setup related issues for new and existing Flash part types. Used Unix/Perl/SKILL languages and Unix job control tools to modify Cadence OSS to implement GUIs for analog and digital simulation tools. Worked with Verilog Design and.

Boise, Idaho, US

Led the efforts on the 1st 50nm SLC Nand Flash part compatible with SPI/SIM interfaces. Coordinated with Fab, Probe, Assembly, Test, Quality, and Application groups to provide information based on the architecture of the part and maintain yield and qualitifcation. Created all the standard documentation used by these groups and external datasheets for.

Boise, Idaho, US

Assisted product engineering teams on 110, 90 70nm DDR2; 110, 90, and 70nm Mobile DDR/SDR; and 70 and 50nm MLC/SLC NAND FLASH part types. Utilized the Advantest and Maverick Nextest testing platforms to characterize timing and circuit failures. Debugged simulations, layout, and schematics using Cadence design software, working closely with Design to.

Boise, Idaho, US

Assisted product engineering teams on 110nm DDR2 part types. Utilized the Advantest testing platforms to characterize timing and circuit failures. Debugged simulations, layout, and schematics using Cadence design software, working closely with Design to optimize and improve part functionality. Analyzed volume part data using JMP and other statistical.

Arlington, VA, US

Held Secret Clearance working on classified Radar Cross Section technology for the RAH-66 Comanche Helicopter. Utilized CATIA, Unix scripting, and in-house software to do radar simulation, modeling, analysis, and testing on the main rotor blade cross sections. Worked closely with the design team on material, design, and manufacturing aspects of the main.

Arlington, Virginia, US

Held military security clearance working for VISION (Virtual Information System Integrated Online) program assisting the embedded design team on the ADMAS (Advanced Distributed Modular Acquisition Systems) vehicle test boxes. Performed troubleshooting, assembly, and maintenance of boxes. Utilized C programming language to help with embedded system design.