A design consultancy, set up to develop microEDM, 2D industrial and 3D metal printing, motion control IP and MRI signal processing algorithms using CUDA GPUs Since February, I have been concentrating on developing IP that I am passionate about and will continue in this happy pursuit unless I am persuaded to take on an external consultancy role.

Deep tech startup to revolutionise the way we transform power - in everything from phones, to electric vehicles to entire factories full of machines and equipment.

I was initially contracted to design an FPGA for their new P4 MEMS printhead, but my duties soon expanded to a more system level role, in addition to the FPGA design work. Additional duties included - schematic capture and advanced mixed signal PCB layout, systems design and debugging, systems level test scripts, some embedded code work along with some instrument making for test jigs to support their new MEMS printhead development. I developed the FPGA/digital/PSU section of the P4 printhead driver as well as a complete driver for their 1201 head (FPGA, PA's, PSU's, PCB design, mechanical design and packaging, python scripts and sytem level testing/debug) over a two and a half year period.

Microfabtech was a small design consultancy specialising in multi-discipline system design and development. One of the more major contracts was the design, implementation and debugging of a complete commercial radar to replace the Watchman systems which are reaching end of life. Various other smaller pieces of work have been undertaken for a diverse client base from laser scanning systems, to the development of consumer products and various peripheral boards for the Raspberry Pi.

My remit was to set up a new group to ensure the company’s SoC products of continually increasing complexity were properly tested at the system level to improve time to market, reduce customer support overhead (as the customers were testing the company’s products and finding faults before CSR) and to integrate my group (and the group’s test procedures) into a relatively new design review process. Responsibilities for this position included:• Selection and recruitment of suitable staff for the group• Training of junior engineers – test paradigms, coding conventions and good practise, analog/digital/RF/audio/mixed signal electronics etc• Definition of test procedures for group• Technical authority for all activities – assistance in resolving system level issues that arise when testing complex Soc systems involving complex test kit and DUT interactions• Management of the group – scheduling of test runs and new test system development on a company priority basis• Support the migration of test infrastructure developed within the group to other groups (such as FW regression test) to enable others to test to a higher level of functionality and device/system coverage.• Definition of test systems (often including a combination of off the shelf and in house developed hardware/software) to qualify new product IP.• Ad-hoc system-level testing of boards and FW releases for the FW team to appraise system performance.• Testing and qualification of significant quantities of evaluation boards for customers – to ensure they receive boards of known performance, complete with test reports for each board.• Training of Apps engineers to run BT and FM testing on duplicates of our test systems.• Customer visits to report product functionality, test progress/results, debug their issues and generally support the customer, as required, on site.

MFT Ltd was set up as a consultancy and to develop micro and nano-scale next generation ultra precision machine tools for the medical, semiconductor and aerospace markets. During this period, several products were developed under consultancy agreements to finance these ongoing nano-technology R&D activities including a highly innovative runway surface friction tester, advanced digital security system and various telecommunications sub-systems including an FPGA ASIC emulator and a WiFi/WiMAX IQ converter development board for a prominent DSP array processor manufacturer.

I joined Artimi (a Cambridge startup) as their hardware system development expert and was responsible for designing and implementing discrete hardware systems necessary to prototype and prove the concepts underpinning the architecture of their UWB ASIC. Notable achievements were :- • Designed and constructed complete end to end UWB demonstrator hardware – one of the first in the world !• Responsible for running the electronics lab, subcontractor relationships and project management for R&D projects.• Design of multi-GHz sampler system implemented in discrete SiGe PECL• Picosecond resolution Transmitter implemented in PECL• FPGA digital system prototyping control board – Xilinx Virtex II-6000• Multi-layer pcb layouts with controlled impedance differential tracking• Overall system design, architecting, testing and general UWB R&D• Designed and constructed several test boards and subsystems for RF / microwave testing of the UWB subsystems• Developed an ultra-low phase noise VCO to support time domain pulse position modulation system development.

• Re-architecting and guidance of the hardware group to better serve the needs of IC validation support.• Acquisition of suitable staff and contract engineers• Project management of legacy and new system designs undertaken by the group• Specification of test subsystems and FPGA based ASIC emulator for validation of the group’s ASICs which is now being sold commercially as a development tool.• Oversight of lab automation hardware, software and procedures• PCB layout of multi-layer, complex, high SI boards to support ASIC testing activities

Relocated from Kent to Cambridge to take a position at Element 14 (a Cambridge startup), employed by the CEO. However, due to a missunderstanding between the CEO and another group in the organisation, who believed they were responsible for the work that I was employed to undertake, it soon became clear that there was limited scope for me to progress in the business, so I moved on as soon as an opportunity presented itself.• Set up a hardware lab to support silicon testing and emulation of a multi-port ADSL chipset• Test harness board design for testing of ASIC designs with an IKOS emulator using multiple Altera FPGAs• MPC823 test harness control processor and embedded code to support silicon testing.

Myself and a colleague were head-hunted from Nortel to work for ADI in the USA, supporting the development of their ADSL business worldwide. The early years were very challenging and exciting as the technology was in its infancy and the spirit of the group was very pioneering. After a few years, the work changed significantly to more commercial challenges than technical and I felt that it was time to move on. • Development of hardware platforms to demonstrate and test group’s ADSL chipsets.• Low cost PCI ADSL card designed, laid-out, assembled, tested and driver code debugged in two weeks.• Multi-line modem card design for customer reference designs as well as internal development use.• Various test jigs, boards and subsystems were developed to support ADSL testing in the lab.• Customer support throughout US and Europe for ADSL product line

• ADSL deployment management system architecture and implementation written in Visual C / Visual Basic.• General test and hardware software systems debugging to support first ADSL trial in the UK.• Test hardware and software designed and constructed to test ADI synchronous serial port operation and protocols to debug early chipset issues.• Embedded control processor subsystem design for a VDSL modem – 21060 SHARC, FPGA, UART, FLASH and a monitor written in assembler / C.

• Design and construction of various digital and analogue test systems for their modular instruments

• Digital trunking radio re-design and value engineering• Integration of digital logic into an FPGA• Audio path and analogue circuitry redesign for optimum fidelity• EMC regulations conformance

• Head Up Display hardware design• HUD embedded software – RF comms protocols and graphical display subsystem with 2D library• High speed scaled integer zooming • H8/330 and H8/510 processor system designs• Speech processing algorithms written in C under Linux

• Design and construction of various IC production electro-mechanical, electronic and optical instruments for the defence industry• High speed digital electronics, high speed converters, mixed signal subsystems, 2101 DSP cards and embedded DSP code used in the various instruments produced.• Complete hardware design of an ADF (Automatic Direction Finder) for the avionics industry.

• Design and development of a complete cnc multi-point IC substrate prober including Electronic subsystems, embedded software (8051 & PL/M), 3D mechanical design and precision assembly and calibration. The unit was used in the lab and demonstrated at international IC fabrication equipment shows.• High speed ECL ASIC test systems design and construction with tight SI constraints

• Digital/Analogue/Power electronics design/debugging. • Mechanical design of aerospace enclosures for instruments.• Designed and implemented various CAD post processors to CNC mill PCB ‘primary-surface’ heatsinks directly from PCB CAD databases. Post processors were written in C/Lex under Unix.

• Responsible for day to day running of PCB cad bureau as well as more complex PCB layouts for customers.• Responsible for the mechanical design, optics, electronics and low-level drivers for a raster scan photoplotter - including device drivers under Microport System V/386

• Initially responsible for precision mechanical design and packaging for aerospace electronic instruments. • Design of processor cards and other subsystems for aerospace instrumentation.• Responsible for mechanical design, interaction with PCB layout engineers, electronics design and software debugging using hardware ICE / 286 processor.

• During my last two years at secondary school I worked in my father’s company, being trained as a toolmaker. After I completed my GCSE’s I undertook the design and construction of a multi-axis, electronically controlled precision part handling instrument. I was responsible for running the toolroom by the end of this period.