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Rob Larkin Email & Phone Number

ASIC Design and Methodology Development at Microsoft
Location: San Francisco Bay Area, United States 13 work roles 1 school
1 work email found @microsoft.com LinkedIn matched
✓ Verified August 2026 4 data sources Profile completeness 100%

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Current company
Microsoft
Role
ASIC Design and Methodology Development
Location
San Francisco Bay Area, United States
Company size
10 employees

Who is Rob Larkin? Overview

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Quick answer

Rob Larkin is listed as ASIC Design and Methodology Development at Microsoft, a with 10 employees, based in San Francisco Bay Area, United States. AeroLeads shows a work email signal at microsoft.com and a matched LinkedIn profile for Rob Larkin.

Rob Larkin previously worked as CAD Automation Engineer at Microsoft and Senior Member of Technical Staff at Axonne. Rob Larkin holds Beng, Electronic Engineering from University Of Westminster.

Company email context

Email format at Microsoft

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{first}.{last}@microsoft.com
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Profile bio

About Rob Larkin

Specialties: • Synthesis & Layout (Fusion Compiler, Genus, Innovus, Design Compiler, ICC2) • Formal Verification (LEC, Formality) • RTL (SystemVerilog, Verilog, VHDL) • Verification (SystemVerilog, SVA) • IP Hardening (ARM Cortex, Mali, Tensilica)Technologies: • Hardware AI Acceleration. • CPU/DSP (Digital Signal Processing) Development. • ISA (Instruction Set Architecture) Development & Profiling. • Processor Design (Blackfin, RISCV) • Graphics Pipelines (Incl. Mobile GPU) • 3GPP (Third Generation Mobile Technology, FDD). • FPGA (Field Programmable Gate Arrays)

Listed skills include Verilog, Systemverilog, Asic, Rtl Design, and 38 others.

Current workplace

Rob Larkin's current company

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Microsoft
Microsoft
ASIC Design and Methodology Development
Redmond, WA
Website
microsoft.com
Employees
10
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13 roles

Rob Larkin work experience

A career timeline built from the work history available for this profile.

Cad Automation Engineer

Current
Microsoft

Redmond, Washington, Us

• Front end synthesis support and methodology.• Power profiling and optimization.

Jun 2024 - Present

Senior Member Of Technical Staff

Axonne

San Jose, California, Us

• Digital Design / Synthesis lead for Automotive startup.• Member of technical staff reporting directly to the CTO.• FE CAD lead managing tools and methodologies.

Apr 2022 - Jun 2024

Gpu Implementation Engineer

Qualcomm

San Diego, Ca, Us

• Hard Macro owner for mobile GPU IP.• Drove power optimizations though a combination of RTL recoding, self gating and SAIF annotation.• Worked with RTL team to identify critical timing paths and find pipelining opportunities to close timing.

Apr 2021 - Mar 2022

Synthesis And Timing Engineer

Microsoft

Redmond, Washington, Us

• Memory and ECC architectures for silicon based AI acceleration. Created hybrid solutions combining third party silicon compilers and Python based Verilog automation.• Timing debug and critical path triage for memory subsystems.• Unit level synthesis of tile based IPs including processor subsystems and memory subsytems.

Jan 2020 - Mar 2021

Principal Design Engineer

Tenstorrent Inc.

Toronto, On, Ca

May 2018 - Dec 2019

Design Engineer

Amd

Santa Clara, California, Us

Nov 2017 - May 2018

Senior Member Of Technical Staff

Altera
Feb 2015 - Jan 2016

Asic Designer

Nvidia

Santa Clara, Ca, Us

Apr 2011 - Nov 2012

Dsp Processor Designer

Mediatek

Hsin-Chu, Tw

Feb 2008 - Mar 2011

Ic Design Engineer

Analog Devices

Wilmington, Ma, Us

May 2004 - Feb 2008

Design And Verification Engineer

Ubinetics
Aug 2000 - May 2004
Team & coworkers

Colleagues at Microsoft

Other employees you can reach at microsoft.com. View company contacts for 10 employees →

KB Kcn Branch Kcn Branch Colleague at MicrosoftVoat Phnum, Phnom Penh, Cambodia View → MY Mohannad Yehia Mohannad Yehia Colleague at MicrosoftBeirut, Beirut Governorate, Lebanon View → TA Tracy A. Hayes Staton Tracy A. Hayes Staton Colleague at MicrosoftHubert, North Carolina, United States View → ما محمد احمد محمد احمد Colleague at MicrosoftRiyadh, Saudi Arabia View → AV Armando Vidal Armando Vidal Colleague at MicrosoftEast Hartford, Connecticut, United States View → NM Nosaiba Mohammed Nosaiba Mohammed Colleague at MicrosoftRiyadh, Saudi Arabia View → CS Cindy Sullivan Cindy Sullivan Colleague at MicrosoftFlorence, Kentucky, United States View → CG Camelia Grannum Camelia Grannum Colleague at MicrosoftEdmonton, Alberta, Canada View → BG Ben Gillis Ben Gillis Colleague at MicrosoftGreater Pittsburgh Region, United States View → AR Amber Rauscher Carrick Amber Rauscher Carrick Colleague at MicrosoftDelmar, Delaware, United States View →
1 education record

Rob Larkin education

  • University Of Westminster
    University Of Westminster
    Electronic Engineering
FAQ

Frequently asked questions about Rob Larkin

Quick answers generated from the profile data available on this page.

What company does Rob Larkin work for?

Rob Larkin works for Microsoft.

What is Rob Larkin's role at Microsoft?

Rob Larkin is listed as ASIC Design and Methodology Development at Microsoft.

What is Rob Larkin's email address?

AeroLeads has found 1 work email signal at @microsoft.com for Rob Larkin at Microsoft.

Where is Rob Larkin based?

Rob Larkin is based in San Francisco Bay Area, United States while working with Microsoft.

What companies has Rob Larkin worked for?

Rob Larkin has worked for Microsoft, Axonne, Qualcomm, Tenstorrent Inc., and Amd.

Who are Rob Larkin's colleagues at Microsoft?

Rob Larkin's colleagues at Microsoft include Kcn Branch, Mohannad Yehia, Tracy A. Hayes Staton, محمد احمد, and Armando Vidal.

How can I contact Rob Larkin?

You can use AeroLeads to view verified contact signals for Rob Larkin at Microsoft, including work email, phone, and LinkedIn data when available.

What schools did Rob Larkin attend?

Rob Larkin holds Beng, Electronic Engineering from University Of Westminster.

What skills is Rob Larkin known for?

Rob Larkin is listed with skills including Verilog, Systemverilog, Asic, Rtl Design, Logic Synthesis, Fpga, Digital Signal Processors, and Formal Verification.

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