Robert Lanier work email
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Robert Lanier personal email
Experienced Senior Electrical Engineer skilled in Field Programmable Gate Arrays (FPGA), Universal Verification Methodology (UVM), SystemVerilog, Xilinx Vivado, Xilinx Advanced FPGA devices, and Hardware Architecture. Strong engineering professional with 20+ years experience in all phases of UVM Verification and FPGA development.
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Electrical EngineerL3Harris Technologies Oct 2023 - PresentMelbourne, Florida, Us -
Senior Electrical EngineerL3Harris Technologies May 2001 - PresentMelbourne, Florida, UsDigital FPGA and ASIC Design Engineer. Design and develop complex digital logic using Verilog and VHDL. Perform all development activities for projects: requirements development, ASIC/FPGA architecture, develop VHDL/Verilog source code for blocks, architect verification environments using UVM and SystemVerilog, develop SystemVerilog assertions, develop UVM verification components, development multiple levels of documentation, including ICD, PDR, and CDR documents.
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Verification EngineerResource Associates Of Nevada, Inc. Nov 2022 - Oct 2023Pahrump, Nv, UsFPGA Verification Engineer at NASA Jet Propulsion Laboratory -
Senior Asic Design EngineerAtmel Corporation Apr 2000 - Apr 2001San Jose, Ca, UsDeveloped Verilog source code for LCD Controller, Interrupt Controller, Power/Reset Controller logic. developed Perl scripts for controlling simulation development flow. Worked with members of senior engineering to resolve ASIC development issues. -
Electrical EngineerL3Harris Technologies Sep 1996 - Mar 2000Melbourne, Florida, UsDigital ASIC Design Engineer - task leader or co-task leader for 0.65um and 0.8um ASIC designs. Developed design changes to ASICs using VHDL, implemented test logic (scan chain, boundary scan, I\O test), developed Perl scripts for ASIC tool report file parsing, performed logic synthesis using Synopsys Design Compiler.
Robert Lanier Skills
Robert Lanier Education Details
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University Of Central FloridaElectrical And Electronics Engineering -
University Of California, BerkeleyElectrical Engineering
Frequently Asked Questions about Robert Lanier
What company does Robert Lanier work for?
Robert Lanier works for L3harris Technologies
What is Robert Lanier's role at the current company?
Robert Lanier's current role is Lead FPGA Engineer with L3Harris.
What is Robert Lanier's email address?
Robert Lanier's email address is rl****@****ris.com
What schools did Robert Lanier attend?
Robert Lanier attended University Of Central Florida, University Of California, Berkeley.
What skills is Robert Lanier known for?
Robert Lanier has skills like Vhdl, Fpga, Xilinx, Asic, Hardware Architecture, Altera, Integrated Circuit Design, Verilog, Signal Integrity, Pcb Design, Digital Signal Processors, Embedded Systems.
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