Led the PHY Systems Engineering efforts for Release 10 LTE UE Categories 4 (BRCM 21892) and 6 modems. Accomplishments of my team included: Development of all LTE modem algorithms, including sample rate processing, channel estimation, MIMO detection, time and frequency tracking, link adaptation, handoff scanning and measurements, interference rejection, and HARQ processing.• calibration associated with the RF impairments including IQ mismatch, group delay, and IIP2• tracking 3GPP standards (mainly RAN4) and ensuring modem compliance • development of high performance CQI algorithms for use with Maximum Likelihood Detection for spatial multiplexing. Individual contributions: • Definition and specification of the mixed signal architecture.• Led design of the advanced transmitter architecture comprising envelope tracking, digital predistortion, and dynamic antenna tuning. • Defined calibration mechanisms for envelope tracking and digital predistortion, AM¬AM and AM¬PM measurement, and DPD actuation blocks.• Defined clocking architecture and all aspects of Analog Front End for multi-mode modem including ADC and DAC specifications, inter-RAT resource sharing, and low power sleep modes.• Developed Verilog model for AFE and controller.

Responsible for development and productization of all PHY layer algorithm and system design includ­ing modem hardware architecture, and embedded software specifications. As employee number six, I built and led the Physical Layer (PHY) system design team (25 engineers), split between Santa Clara and Bangalore, India. Developed simulation platform used for link­level simulations, and bit­-exact modeling of RTL and software implementations. Architected and implemented detailed design of FFT engine, channel estimation, frequency and time tracking, time domain signal processing, compensation of direct conversion radio impairments, and uplink beamforming (industry first). Beceem's modem achieved best-­in-­class WiMAX performance and 70% market share. Led design of CAT3 LTE modem, including baseband architecture design, MOPs estimation, and simulator design. Managed RFIC development teams in Santa Clara and Irvine which developed a single chip WiMAX (802.16e) SoC including Cartesian feedback linearization. Acquired by Broadcom.

Led eforts to develop Assisted­GPS baseband IC (SiRFStar III). Baseband IC consisted of an ARM7TDMI processor system and frequency domain correlation engine. Correlation engine has throughput equivalent to 200K complex correlator pairs. Made significant technical contributions to the FFT engine, control logic, and architecture. Managing entire program comprising 45 engineers.

One of four founding members of Ashtech Inc. Designed 8 ASICs personally, managed and con­tributed to design of 9 others, including 4 mixed signal. All were functional on the first pass. Inven­tor of "Z­-Tracking" Y-­code tracking technology. Z­ Tracking receivers accounted for greater than 35% of Ashtech/Magellan precision GPS receiver sales. Experience leading a number of complex GPS receiver developments. Substantial contributions in many areas of hardware and algorithm design and implementation: antenna design, RF architecture, baseband DSP, tracking loops, PVT computation, Kalman filtering. Designed and implemented a number of communications functions including GPS guided radio receiver, Viterbi decoders, and modulators. Led Moscow development center on 700K-­gate IC design. Developed post-correlation GPS antenna array and associated algorithms.