Robert Mifflin Email & Phone Number

Fallbrook, Ca, Us

San Marcos, California, United States

Greater San Diego And Orange County Areas

Interview the customer and determine the total system requirements and then identify the best way to design and implement the product. Focus on creating embedded hardware and software for over 35 companies.

San Marcos Calif

MASP instructor on Camp Pendleton teach over 1000 Marines mathematics.

La Jolla California

Materials PhD Grad student working in an DNA sequencing development lab on CNT isolation, purification and chiral identification.Bioengineering - Masters Cell separation, micro-fabrication, nano materials, single molecule detection.

Irvine California

I was brought in to turn around a 50 million program on a printer chip set with a team of over 50 internal engineers and another 20 to 30 engineers on the project through sub contractors and other vendors. I interviewed the complete hardware and software team, restructured the the man loading and work schedules for the software, hired and set up an in house hardware/software product validation and test team used to track, prioritize and eliminate hardware and software bugs using state of the art SCM and SDLC product - Star Team - one of the first team driven graphical Software Control Management and Design Life Cycle software packages. Fortunately there was a great team of engineers and we were able to stop, analyse and shift the complete program in under two weeks. I was responsible for working with the legal department to define the IP ownership (completely missing) and contract deliverables between Rockwell and the customer.I had to directly deal with the customer for engineering flaws found in their product circuitry. By using detailed circuit calculations and a lot of tack I was able to explain why the design had to be changed and what our teams recommended design change was.The program was put back on schedule, personnel problems were addressed, project systems to observe and generate usable metrics were put in place thus making status reporting real and relevant. I then interviewed and selected my replacement which I put then put forward and was accepted as I transitioned on to the next project turnaround.If you bought an Brother inkjet with a Rockwell chipset during the early 2000s - it had our teams design inside.

Irvine California

Senior Architectural Design Engineer for the Architecture group reviewing and coordinating system on chip architectures. My primary goal was to verify system on chip resources and architecture would meet desired product goals. Typical analysis that I carried out would consist of an interview with each team for his particular subsystem. I would then analyse the product and if I found errors in bandwidth, processing power, memory size, or technology size selected (which would affect chip cost) I would call a team meeting to review my numbers and models. Then as a group we would propose solutions. Typical errors found:1. System memory half the size it needed to be to hold the control code. 2. Processing power insufficient to allow high level code translation of existing code. Solution was a hand optimized algorithm for the 12 modem multiprocessors system on chip. 3. Chip size was too large and therefore yield would be to low to make the price point required. Example of duplication of work found (5000 engineers in two buildings - fun fun fun!): Viterbi processor block being designed independently on two different floors. One had just been completed. By introducing the two engineers the second engineer was able to improve the design and add compatible test features from the first.Example of improving overall systems architectures As a member of the manufacturing test system committee I was able to coordinate the system on chip and processor interface requirements for future designs to improve both external test times while enhancing self test access access features. By proposing and implementing easy access documentation for our custom cores and peripherals, integration of new systems and support for expanded capabilities was communicated across over a dozen design groups.Identified over 100 million in saving by using existing core architectures modules.

Irvine California

Sr Design engineer for the first CMOS imagers used in PCs. Interfaced with the Rockwell Science Center to move the design from space based applications to commercial applications (USB camera).Proposed the technology be used in a fingerprint scanner - that was later take to form a company know as Who Vision. Generated a patented packaging concept during the interview by eliminating the hermetic packaging with optical glass (6$) to a chip on PCB with integrated plastic lens with mount for focusing lens embedded in the shape (1$). Worked with packaging engineer for production of bare imager with lens system.Mentored and provided guidance to young engineers for design FPGA based imager test beds.

Masters Bioengineeriong, Nano Materials - Cnt And Dna, 3.51

Worked in a state of the art DNA sequencing development lab. Our lab focused on researching methods to analyze DNA and proteins.

Master Of Science (Ms), Bioengineering And Biomedical Engineering, 3.51

Using my 30 years of experience I worked as a consultant for DNA sequencing equipment manufacturer while attending UCSD. Performed design.

Bachelor Of Science (Bs), Electrical And Electronics Engineering

Activities and Societies: Wife and three kids kept the weekends busy.Full time Job in micro/mini applications and peripheral design.