Robert Schumann Email & Phone Number

Syracuse, New York, United States

Canastota, New York, United States

East Syracuse, New York

Rochester, New York Area

Syracuse, New York Area

Defined, developed, and documented digital logic designs from system requirements for defense Radar and Sonar applications. Responsible for designs from concept through system integration.• Completed Waveform Generator (WFG) firmware redesign. The goal of the Virtex-4 FPGA firmware redesign was to simplify and make the module design more reliable. Successfully tested the new firmware through system integration.• Conducted digital circuit redesign for the Radar Row Receiver T/R Board. Included updating CPLD VHDL code, interfacing to RF circuits, and new part selection to eliminate potential obsolete parts.• Completed the addition of an AGC function to the STC function for the Digital Receiver Exciter (DREX) Receiver Virtex-5 FPGA.• Successfully completed Array Control Board (ACB) Firmware updates to its STC schedule.• Lead Firmware Engineer for EW program. Completed the development of Firmware Requirement Specifications for eight Firmware Configuration Items (FWCI) for the Below Deck Equipment. Generated the Firmware Circuit Design Documents (CDD). Developed the VHDL code for three FWCIs with Virtex-5 FPGAs.• Created the VHDL code for the Doppler Filter Bank (DFB) application for the HPCM module using a Xilinx Virtex-5 FPGA. Design used SRIO and Aurora interfaces.• Generated System Requirements flow down to nine Radar hardware subassemblies and six hardware vendor specifications.• Designed an airborne Radar Controller Interface module using a Xilinx Virtex-II Pro FPGA. Developed LabVIEW code for application-specific testing.• Developed a Direct Digital Synthesizer (DDS) design using a Xilinx Virtex-II Pro FPGA.• Designed a 256-point, Radix 4 FFT using a Xilinx Virtex-II FPGA.• Developed a four-channel FIR filter design using a Xilinx Virtex-E FPGA for an A/D Converter board design.• Designed a ten-channel Data collection board using LVDS interfaces and four Xilinx Virtex FPGAs. The design also included an Altera EPLD for VME access control.

Syracuse, New York Area

Responsible for the schedules, development, and design of Sonar and Radar products.• Designed a status collection and reporting function that included an A/D converter and a Xilinx FPGA.• Redesigned boards to replace obsolete ASICs and TTL parts with Actel FPGAs.• Developed two multi-channel waveform generator PWBs for an experimental sonar measurement system. Designs consisted of D/A converters, op amps, FIFOs, programmable logic, and digital logic.• Designed D/A converter module for submarine sonar audio processing sub-system. Design employed D/A converters, switched capacitor filters, active filters, and digital logic. Responsible for leading a design team from concept through implementation.• Developed the main timing function and digital beamforming signal generator for mine-hunting sonar towed body. Responsible for electrical design of housing sub-system.• Designed front-end digital signal processing function for a sonar research project.