Robert Stevens Email and Phone Number
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Robert Stevens is a FPGA Technical Fellow, VP of Engineering at Frontgrade Technologies. He possess expertise in fpga design, xilinx, altera, system verilog, vhdl and 7 more skills.
Frontgrade Technologies
View- Website:
- frontgrade.com
- Employees:
- 452
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Fpga Technical Fellow, Vp Of EngineeringFrontgrade TechnologiesHuntsville, Al, Us
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Fpga Technical FellowFrontgrade Technologies Nov 2024 - PresentColorado Springs, Colorado, Us
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Expert R&D EngineerMercury Systems Sep 2022 - Dec 2024Andover, Ma, Us -
Technical FellowAbaco Systems Sep 2021 - Sep 2022Huntsville, Al, UsTech Fellow -
Expert R&D EngineerMercury Systems 2002 - Aug 2021Andover, Ma, UsExpert R&D Engineer: 2019-PresentMixed SignalFPGA Future Technology Group Manager/ Lead Designer- Firmware manager and lead designer for over 170+ FPGA designs and 220+ FPGA IP re-usable cores since 2008- FPGAs range from Xilinx V2-Pro, V4, V5, V6, V7, Zynq, Ultrascale, UltraScale+, Versal- High speed ADC and DAC interfaces, RFSoC- High speed serial links: PCIe, 100Ge, 40Ge, Serial RapidIO, JESD204B, Aurora, Serial FPDP, XAUI, 10Ge, etc- AXI4, AXI4-Stream, and AXI4-Lite control/data planes- High speed memory interfaces: DDR3 Sdram, DDR4 Sdram, QDR2+ Sram- Custom high speed RF control plane- Embedded Processor System design: Zynq ARM, MPSOCDirector of Engineering: 2012-2014- Directed the Engineering group in the design and development of high-speed embedded sensor products- High speed ADC and DAC sensor designs- 6U: VME, VXS, VPX- 3U: CompactPCI- FMC, XMC- Also served as Firmware manager and lead IP designer
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Sr. Design EngineerDiscoverycom/Nokia Broadband Systems 1999 - 2002Nokia: Digital designer for Nokia's D500 48-port ADSL line card: MPC850 and Xilinx Spartan-IIDigital designer for T500e product line: MPC850 and Xilinx Spartan-IIDiscoveryCom:Digital designer for LoopMaster controller: MPC850 and Xilinx Spartan-IICompany acquired by Nokia for ~220M
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Sr. Field Application EngineerMemec International Components Group 1996 - 1999Xilinx Dedicated FAEActel FAEMemec Design Group
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Sr. Design EngineerVmic 1995 - 1996Designed 1st Generation PCI-to-VMEbus bridge for VMIC's Intel based SBCsCo-Authored Endian conversion optimization for VME burst transfersPatent no. 6,032,212
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Principal Development EngineerIntergraph Corporation 1991 - 1995Madison, Al, UsEmbedded digital control design for Multi-sync monitors -
Asic Design EngineerSci Systems Inc 1987 - 1991ASIC Designer:Microcontroller ASIC for DSPMulti-processor Bus Interface for Longbow Apache Helicopter C3 Computer
Robert Stevens Skills
Robert Stevens Education Details
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Auburn UniversityBachelor Of Electrical Engineering -
Auburn University At MontgomeryPre-Engineering
Frequently Asked Questions about Robert Stevens
What company does Robert Stevens work for?
Robert Stevens works for Frontgrade Technologies
What is Robert Stevens's role at the current company?
Robert Stevens's current role is FPGA Technical Fellow, VP of Engineering.
What is Robert Stevens's email address?
Robert Stevens's email address is ro****@****aco.com
What is Robert Stevens's direct phone number?
Robert Stevens's direct phone number is +197880*****
What schools did Robert Stevens attend?
Robert Stevens attended Auburn University, Auburn University At Montgomery.
What skills is Robert Stevens known for?
Robert Stevens has skills like Fpga Design, Xilinx, Altera, System Verilog, Vhdl, Hdl Author, Modelsim, Synplify Pro, Clearcase, Embedded Systems, Firmware, Asic.
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