Full custom mixed signal design engineer specializing in instrumentation grade wideband SiGe BiCMOS ASICs for test and measurement equipment.• Front-end design: Expert user of Cadence Virtuoso front-end tools and OCEAN scripting.• Physical design: Robust layout solutions using multiple (DRC/LVS) verification tool flows.• Focus on reliability➢ Front-end electrical over-voltage/current design validation (ERC)➢ Back-end layout reliability verification of layout based circuit oscillations, Electromigration (EM), and IR-drop issues.• Project leadership: Lead designer on a next-generation wideband buffer amplifier ASIC involved in a cross-organizational, cross-functional development.