Robert Gentile Email & Phone Number

Austin, Texas, United States

Memory Firmware Technical Lead - System Platform and I/O Firmware OrganizationDDR5 / LPDDR5 Memory Controller and DDR PHY Firmware Architecture

Austin, Texas Area

Lead Firmware Engineer/Architect for DRAM Controller and PHY for programs utilizing DDR4/5 and LPDDR4/4x/5/5+ technologies. Architected and developed core DDR4 and LPDDR4/4x firmware support used in AMD Ryzen and Epyc processors.Wrote algorithms to optimize memory bus signal integrity, performance, power consumption.Developed a firmware-resident memory self-test and margining tool for AMD Epyc server processor family, working closely with major customers on specification and interface with UEFI environment.Collaborated with a team on the design of a new bootloader architecture used in AMD Ryzen and Epyc Processors.

Austin, Texas Area

Developed DDR4 BIOS Support for memory controller and PHY, including combo DDR3/4 support.Received Spotlight award for DDR4 Memory Enablement on AMD flagship APU.Owner of memory BIOS architecture and development for major gaming console SoC program from bring-up through production. Worked closely with the customer through an accelerated schedule to ensure platform performance, stability and custom feature enablement.Developed custom BIOS framework for executing memory initialization firmware in a pre-silicon simulation/emulation environment.

Austin, Texas Area

Primary memory BIOS owner for development, emulation support, bring-up support, of DDR3-based server processors.Received Executive Spotlight Award for BIOS development role in DDR3 LRDIMM enablement.Wrote code for DDR2 and DDR3 memory initialization and training algorithms. Optimized code for shorter boot time and greater memory stability.Developed BIOS-resident memory diagnostic which improved system memory integrity and failure analysis for customers.

Boise, Idaho Area

Provided BIOS support on a team enabling the industry’s first DDR memory controller and motherboard.Authored BIOS Porting guide for Micron DDR chipset.Architected Windows DLL hardware interface library, drivers, firmware, and Python scripting wrapper for memory prototyping platforms, which significantly improved hardware testability, and code re-usability and reduced development time for future projects.Developed programming language and compiler for memory pattern generator used in prototyping and production test equipment.

Beaverton, Oregon

Responsible for BIOS development, on-site support and debug for Intel desktop board division.Worked with customers to quickly resolve issues, and implement features for high volume products from Gateway, Dell, Micron and others.

Nampa, Idaho

Responsible for developing/debugging custom BIOS software for Micron desktop/workstation PCs.Organized original BIOS development at the company, including research of core code vendors, pursuing software licenses, developing test plans, managing source code control, and training other engineers.