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• Years of functional and global cross-functional leadership delivering short and long-term objectives• Well versed in all stages of product development cycle: design, development, staging, integration, and high-volume manufacturing• Excel in a wide range of functions on technology development: component design, wafer process, and integration, system integration, device quality reliability, team management, program management• Steady, pragmatic, and results-oriented leadership style• Excel in both large corporate environments (WD) and small start-up-like operations (Headway)o Data analytics o Reliability o Cross-functional leadershipo Failure analysis o Positive can-do attitude o Team leadershipo System integration o Innovation o Program management
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Principal TpmAmazonSan Francisco Bay Area -
Principal Techincal Program Manager At Product IntegrityAmazon Lab126 Jan 2022 - PresentSunnyvale, Ca, Us -
Director Of Engineering, Technology Program Management For Epmr ReliabilityWd, A Western Digital Company May 2016 - Feb 2022San Jose, Ca, UsLead a WW cross-functional team to drive quality and reliability of ePMR technology with 50+ members from head and media design, Hard Disk Drive (HDD) integration, quality, Materials Lab, firmware, test development, pilot line, new product introduction, and factory• Delivered the industry’s first ePMR product for datacenter customers (Tier 1 Cloud computing companies) and significantly improved company technology competitiveness, resulting in $1B revenue gain and 8% gross margin gain in 2 quarters since customer adoption.• Significantly improved team harmony, capability, and effectiveness with a pragmatic/data-driven approach and by being the sole owner for the entire product cycle• Lead the creation of a lifetime test ecosystem from the ground up, including methodology, failure acceleration schemes, software and WW logistics for evaluating experimental HDDs in high volume in US and JP pilot lines, enabling large sample-size real-life evaluation • Drove the fundamental understanding and improvement of ePMR reliability through design of experiments, failure analysis (performance metrics, Auger, AFM, SEM, TEM, Raman), and proprietary data analytics (JMP, Reliasoft using Weibull)• Lead the development of customer qualification specs and the creation of new high-volume HDD manufacturing quality monitoring procedures• Lead evaluations of external suppliers’ ePMR technology to augment supply volume, developed solutions to improve its lifetime, qualified it for production• Drive quality monitoring procedures at component factories in Asia to enhance production predictability -
Director Of Engineering, Thermo-Mechanical Design And IntegrationWd, A Western Digital Company Aug 2010 - May 2016San Jose, Ca, UsRan TM design and integration team with 10+ members and transformed it into a focused, effective, champion team • Delivered 3 generations of PMR TM solutions (500GB, 750GB, 1TB/pp), which brought in >$10B revenue, and the 1st generation Heat Assisted Magnetic Recording (HAMR) TM design through design modeling (SolidWorks, Ansys), rigorous wafer and backend DOEs, data analytics, and failure analysis• Continued ownership throughout manufacturing, improved manufacturability and yield• Launched company’s first dual independent spacing control product, increasing capacity and improved reader reliability• Launched WD’s first product with a thermal sensor to improve reliability -
Manager, Wafer Cmp Process DevelopmentHeadway Technologies Oct 2005 - Aug 2010Milpitas, Ca, UsBuilt and ran an effective CMP development team from the ground up • Led the successful development of 2.2T and 2.4T CMP processes, eliminated corrosion-induced failures, enabling the launch of PMR products, resulting in >$1B revenue• Drove the development of leading shield and leading-edge taper CMP process, increased capacity by 10~20%• Led the qualification of new generations of CMP tools, enhancing uniformity and protrusion controllability -
Senior EngineerHitachi Gst Jan 2000 - Oct 2005San Jose, Ca, UsDeveloped and launched new disk defect detection technology, techniques to characterize disk nano/microwaviness/flatness, and techniques to predict disk magnetic performance based on surface texture, and an innovative method to apply surface texture
Roger Lo Skills
Roger Lo Education Details
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University Of California, Berkeley, Haas School Of BusinessExecutive Education -
University Of California, BerkeleyMechanical Engineering -
National Taiwan UniversityMechanical Engineering
Frequently Asked Questions about Roger Lo
What company does Roger Lo work for?
Roger Lo works for Amazon
What is Roger Lo's role at the current company?
Roger Lo's current role is Principal TPM.
What is Roger Lo's email address?
Roger Lo's email address is ro****@****way.com
What is Roger Lo's direct phone number?
Roger Lo's direct phone number is (949) 672*****
What schools did Roger Lo attend?
Roger Lo attended University Of California, Berkeley, Haas School Of Business, University Of California, Berkeley, National Taiwan University.
What are some of Roger Lo's interests?
Roger Lo has interest in Science And Technology.
What skills is Roger Lo known for?
Roger Lo has skills like Failure Analysis, Thin Films, Jmp, Characterization, Design Of Experiments, Metrology, Semiconductors, Manufacturing, Engineering, Engineering Management, Sensors, Process Simulation.
Who are Roger Lo's colleagues?
Roger Lo's colleagues are Alexia Tavares, James D'souza, Reinaldo Russo, Robin Horton, Chandan Kumar, Dev Rai, Havana Korkmaz.
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