Gerald Roletter Email & Phone Number

San Diego, Ca, Us

Product Management for IoT division with focus on Connected Cameras.

San Diego, Ca, Us

Director of Product Engineering for IoT BU focusing on hardware needs for Camera, Video and Computer Vision.

San Diego, Ca, Us

Leading ASIC Design Engineering team responsible for Computer Vision and Video codec development. We own the process from architecture to RTL implementation and through to Synthesis. Responsible for IP development for Video and Computer Vision into all segments - Mobile, Auto, XR/AR, IoT, etc.

San Jose, California, Us

Product Engineer for Xcelium Multi-core simulator. Responsible for ensuring successful bring-up of Cadence’s multi-core SystemVerilog simulator in multiple top-tier customer sites and designs. Debug issues between single-core and multi-core simulators on massive SoC and large unit-level designs. Analyze and improve multi-core performance in customer designs. Work with R&D on feature and bug scheduling and prioritization. Create test cases in SystemVerilog to replicate issues seen at customer locations.

Lead architect for MIMO wireless Integrated Radio Unit. PHY layer implementation for Cohere's 5G modulation. Implemented various signal processing blocks as well as the top-level integration. Design targeted Xilinx Ultrascale FPGA. Developed code in Verilog, C and Perl. MATLAB used for debug. Hands-on experience in lab bring-up of FPGA and board.

Minato-Ku, Tokyo, Jp

ASIC architect involved in SoC architecture for automotive entertainment ASICs using the Ethernet AVB standard to carry audio and video and interfacing to an applications processor over USB3.0. Also involved in architecture for performance monitoring unit of custom ASIC with multiple cores and sensors using a Sonics interconnect fabric and OCP interfaces.

Redmond, Washington, Us

Responsible for hardware performance verification on the Xbox including the GPU, CPU and Southbridge. Testing is done in simulation and emulation on the Palladium emulator writing tests in C and scripting in perl. Was architect for the Performance Monitor Unit in Southbridge that enabled performance monitoring and error statistics gathering in real-time while device is operational.

Riverside, Ca, Us

- CGI development in C++ for MySQL database- Responsible for database storing alert information for Fidelis' Cyber Security product

Palo Alto, California, Us

Developing image processing algorithms for motion estimation and motion compensation frame rate conversion for use in ASICs targeted for 120 and 240Hz LCD TVs. Algorithm modeling in C/C++. Embedded firmware development in C for LCD TVs.

Santa Clara, California, Us

At peak had 20 direct reports and acted as program manager for ASIC development including full chip design as well as algorithm and SW teams. Led international teams based in India and China. Specialized in digital TV chips - video decode, encode, display and demod.

Consulting work for ATI Inc. in ASIC verification for the ASIC used in ATI's consumer product "Theater 550" using Verilog and C (PLI).

Start-up company formed with other ex-Ericsson co-workers. Company provided WiFi internet access at locations such as hotels, coffee shops, restaurants and sports venues. Company was sold to a publicly traded company in 2003 (Diamond I Inc.).

Kista, Stockholm, Se

Led ASIC team in development of Network Processor used in Ericsson IPI Router. Created ASIC verification environment and developed portions of ASIC in Verilog as well as responsible for I/O timing analysis.

Algorithm modeling in C, test bench development, ASIC implementation of physical level digital TV demodulator in Verilog. Developed entire verification infrastructure. Worked on two first-silicon success chips leading to eventual purchase of start-up by ATI.

Software development of MPEG-2 transport level models and verification GUI using Visual Basic. Architected the PID filter ASIC and led verification effort for the chip. Worked on verification of FEC ASIC.

Developed signal processing algorithms and implemented those in software for Navy ASW simulator. Extensive use of MATLAB for experimentation and filter design. Developed image processing algorithms in C for project to detect metal fragments in helicopter transmission fluid. Led common transponder effort and developed code in real-time system in C.

Msee, Electrical Engineer - Emphasis In Signal Processing

Bsee, Electrical Engineering

Non-Degree Post Masters

Non-Degree Post Masters

Non-Degree Coursework Uscs Extension