Gary R.
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Gary R. Email & Phone Number

Software Consultant at Cyborg Kitten LLC
Location: New York City Metropolitan Area, United States 11 work roles 3 schools
1 work email found @cytoveris.com 8 phones found area 203, 215, and 610 LinkedIn matched
✓ Verified July 2026 4 data sources Profile completeness 86%

Contact Signals · 1 work email · 8 phones

Work email g****@cytoveris.com
Direct phone (203) ***-****
LinkedIn Profile matched
3 free lookups remaining · No credit card
Current company
Role
Software Consultant
Location
New York City Metropolitan Area, United States

Who is Gary R.? Overview

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Quick answer

Gary R. is listed as Software Consultant at Cyborg Kitten LLC, based in New York City Metropolitan Area, United States. AeroLeads shows a work email signal at cytoveris.com, phone signal with area code 203, 215, 610, and a matched LinkedIn profile for Gary R..

Gary R. previously worked as Director Software Engineering at Proteowise and Chief Software Architect at Cytoveris Inc.. Gary R. holds Bsce, Computer Engineering from Syracuse University.

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Email format at Cyborg Kitten LLC

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*@cytoveris.com
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AeroLeads found 1 current-domain work email signal for Gary R.. Compare company email patterns before reaching out.

Profile bio

About Gary R.

Software Engineer specializing in embedded software and digital hardware. Areas of expertise include digital signal processing, optimizing mathematically intensive calculations for speed, exploiting parallelism using SIMD processors, and implementing scientific algorithms.Specialties: Embedded C/C++, C#, Python, MATLAB, DSP, linux, RTOS, high-performance computing, microprocessors

Current workplace

Gary R.'s current company

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Cyborg Kitten LLC
Cyborg Kitten Llc
Software Consultant
New York, NY, US
AeroLeads page
11 roles

Gary R. work experience

A career timeline built from the work history available for this profile.

Software Consultant

Cyborg Kitten Llc

New York, Ny, Us

Director Software Engineering

Image processing for segmentation and quantitation of proteins in novel new device for revolutionizing western blot tests.

Chief Software Architect

Farmington, Connecticut, Us

Hired as sole software engineer and ultimately lead a team of five software engineers. Responsible for all software for a series of custom multispectral and Raman spectroscopy devices designed to detect the optical signature of cancer in excised tissue samples during surgery in real time.• Implemented embedded C/C++ code to control data acquisition, motion controllers, and sensors monitoring device status on I2C, SPI, UART, and USB interfaces.• Involved in board bring up, debugging and designing workarounds for hardware issues.• Implemented GUI and application flow control using C# in Visual Studio IDE.• Implemented and oversaw development of machine learning algorithms in Python to detect cancer. Implemented CNN, SVM, and Random Forest. Used t-SNE, PCA, LDA for data visualization and exploration.

Senior Embedded Software Engineer

Hyperfine Research, Inc.

Designed and implemented embedded software for a portable MRI unit running Linux.• Implemented embedded software in C++ to control hardware for real-time data acquisition.• Developed Python software for system diagnostics, factory bench test, and power-on self-test.• Implemented sensor and motor-controller software for pressure-controlled self-propelled motion of the unit.• Maintained C code for NIOS processor embedded in an FPGA.

Mar 2018 - Jan 2019

Senior Software Engineer

Branford, Ct, Us

Designed and implemented machine vision and instrument control software for automated lab equipment used for microbial security and food safety.• Implemented image-processing and object-detection software in MATLAB• Implemented multi-threaded C# software to position optics, acquire images, and to control pneumatic pumps, thermal chillers, and magnetic fields on device• Conceived and implemented new algorithms to optimize cell counts from images and reduce instrument run time per test• Implemented self diagnostics• Developed GUI front end in WPF using .NET framework and Visual Studio IDE.• Developed additional ancillary software tools for biologists and chemists working on the platform

Jun 2016 - Mar 2018

Principal Embedded Dsp Engineer

Branford, Ct, Us

Architected and implemented real-time multi-threaded embedded software in C for patient monitoring devices. Designed medical hardware with embedded processors, wireless communication devices, and data acquisition hardware.• Implemented embedded software for Coldfire architecture, CodeWarrior development tools• Implemented embedded software for Analog Devices Blackfin processor, Visual DSP++ tools• Implemented embedded software for Silicon Labs 8051, Keil µVision development tools• Designed 2.4GHz Wireless communication board with proprietary protocol• Debugged/integrated hardware and software in lab with a variety of test equipment

Sep 2008 - Jun 2016

Solutions Architect

Aspex Semiconductor

Architected and implemented embedded software to accelerate image-processing applications using Aspex’s massively parallel SIMD DSP hardware. Projects included wavelet video compression, digital cinema demosaicing, machine vision for LCD wafer inspection, and H.264 video encoding. Worked directly with customers to define project scope, schedules, and acceptance requirements. • Accelerated customer algorithms on SIMD hardware providing up to 50X speed improvement• Defined APIs, architected and delivered multi-threaded C code for Windows and Linux• Optimized mathematically-intense algorithms for highest performance• Provided pre-sales support, conducted customer training and authored technical white papers• Investigated algorithms for video encoding preprocessing (deinterlacing, noise reduction, etc.)

Jul 2006 - Sep 2008

Principal Engineer

Us

Developed telecommunications products for multi-service access, aggregation and switching for 3G wireless and wireline networks. Implemented network processor software for performance-critical scheduling and classification algorithms. Optimized embedded code for speed and size where challenges included fixed-point numerical precision and hard real-time limits.• Designed, debugged and documented C code for Motorola PowerPC running Linux• Developed embedded assembly code for Agere APP550 network processor• Implemented software device drivers to communicate with hardware devices• Optimized classification and scheduling for Ethernet, ATM, MPLS and other protocols

Apr 2003 - Jul 2006

Principal Engineer

Shelton, Ct, Us

Developed two generations of ATM ASICs for voice and data communications. Projects included embedded processors running MicroC/OS RTOS, custom hardware pipelines, and real-time cell-processing code. • Developed hardware/software system architecture and co-authored system specification• Designed, debugged, and documented C code and embedded firmware• Lead system integration effort in lab to deliver device on schedule

Jan 2001 - Mar 2003

Principal Engineer

Santa Clara, California, Us

Developed 3D graphics acceleration ASICs for PC market. Participated in software development and hardware architecture for several generations of hardware graphics accelerators for Direct3D and OpenGL.• Co-architected hardware pipeline for fastest 3D geometry setup at the time (15M triangles/second)• Implemented emulator in Microsoft Visual C++ to verify algorithms and hardware design• Developed algorithms to accelerate OpenGL and Direct3D implementations• Defined verification methodology and lead 12 engineers writing verification software in C/C++• Assigned software tasks, created and managed schedules, mentored junior members of team

Sep 1995 - Jan 2001

Principal Engineer

Picker International

Designed software and hardware for 3D image-processing platform with multiple TI TMS320C80 RISC/DSP processors. Implemented new rendering algorithms for real-time visualization of medical data from CT and MRI scanners in a multiprocessor distributed-memory environment using C code and assembly code.• Implemented all microcode on custom VLIW hardware for 2D and 3D medical visualization• Designed Xilinx FPGA for convolution board in a medical-imaging workstation• Designed DSP board including TI TMS320C80 processor, Altera FPGAs, and SDRAM

Mar 1990 - Sep 1995
3 education records

Gary R. education

Bsce, Computer Engineering

Syracuse University

Mba, Business Administration And Management, General

La Salle University

Msee, Digital Signal Processing

Villanova University
FAQ

Frequently asked questions about Gary R.

Quick answers generated from the profile data available on this page.

What company does Gary R. work for?

Gary R. works for Cyborg Kitten LLC.

What is Gary R.'s role at Cyborg Kitten LLC?

Gary R. is listed as Software Consultant at Cyborg Kitten LLC.

What is Gary R.'s email address?

AeroLeads has found 1 work email signal at @cytoveris.com for Gary R. at Cyborg Kitten LLC.

What is Gary R.'s phone number?

AeroLeads has found 8 phone signal(s) with area code 203, 215, 610 for Gary R. at Cyborg Kitten LLC.

Where is Gary R. based?

Gary R. is based in New York City Metropolitan Area, United States while working with Cyborg Kitten LLC.

What companies has Gary R. worked for?

Gary R. has worked for Cyborg Kitten Llc, Proteowise, Cytoveris Inc., Hyperfine Research, Inc., and Ancera.

How can I contact Gary R.?

You can use AeroLeads to view verified contact signals for Gary R. at Cyborg Kitten LLC, including work email, phone, and LinkedIn data when available.

What schools did Gary R. attend?

Gary R. holds Bsce, Computer Engineering from Syracuse University.

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