Ryan Rumsey Email & Phone Number

Santa Barbara, Ca, Us

Arlington, Va, Us

Firmware design and integration for Electronic Warfare and Radar countermeasures. HDL digital design for FPGA and ASIC. RTL QuestaSim and MATLAB Simulink simulation. Model-based Simulink HDL Coder design. Digital signal processing algorithm implementation for EW applications. FPGA netlist timing closure and fabric area/power optimization. AMD/Xilinx and Intel/Altera SoC FPGA device integration on custom low-SWaP EW products. Embedded hardware and software integration with hands-on lab equipment.

San Diego, California, Us

I create, maintain and update automated test scripts written in JavaScript to test GOLDesp. Tools used involve Test Complete 10/11 and JIRA. This was a part-time position in the Test & Evaluation group.

Sept. 2013 - June 2014: Student GraderEach quarter I graded student homework and quizzes for up to 4 calculus courses.Sept. 2014 - June 2015: Professor's AssistantI help students with their lab work in two sections of the Advanced Digital Design course, focusing on microprocessor architecture and assembly language.

San Jose, Ca, Us

I organized a new lab space which was consolidated to accommodate multiple engineering teams within the company, plus enabled a system for internal inventory tracking for team assets. I Co-authored two applications notes, on SPI and BPI UltraScale FPGA configuration. I developed a reference design for configuring an UltraScale FPGA in slave serial mode using a low-cost microcontroller and SPI flash device. This included creating a system schematic and writing code in C for the microcontroller.In addition to my primary tasks, I helped debug and test the latest software revisions of Vivado, as well as research an RFID solution for internal inventory tracking.

San Jose, Ca, Us

FPGA configuration validation, benchmarking and method design. Documentation writing. Systems project team leadership.I helped validate and update methods developed by Xilinx to configure and FPGA from SPI and BPI flash memory devices. Also, I worked as the lead on a team of interns to design and build a science exhibit for Happy Hollow Zoo in San Jose, CA.