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Bob Wiser Email & Phone Number

Analog Design Manager @ Meta | ex-Verily/Google[x], Stanford at Meta
Location: Palo Alto, California, United States 12 work roles 3 schools
1 work email found @adecco.com LinkedIn matched
✓ Verified Jul 2026 4 data sources Profile completeness 100%

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Work email d****@adecco.com
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Current company
Role
Analog Design Manager @ Meta | ex-Verily/Google[x], Stanford
Location
Palo Alto, California, United States

Who is Bob Wiser? Overview

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Quick answer

Bob Wiser is listed as Analog Design Manager @ Meta | ex-Verily/Google[x], Stanford at Meta, based in Palo Alto, California, United States. AeroLeads shows a work email signal at adecco.com and a matched LinkedIn profile for Bob Wiser.

Bob Wiser previously worked as Analog Design Manager at Meta and Director Of Technology Development at Ceremorphic, Inc.. Bob Wiser holds Phd, Electrical Engineering from Stanford University.

Company email context

Email format at Meta

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*@adecco.com
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AeroLeads found 1 current-domain work email signal for Bob Wiser. Compare company email patterns before reaching out.

Profile bio

About Bob Wiser

Bob Wiser is a Analog Design Manager @ Meta | ex-Verily/Google[x], Stanford at Meta. He possess expertise in applicant tracking systems, temporary staffing, staffing services, temporary placement, talent acquisition and 27 more skills.

Listed skills include Applicant Tracking Systems, Temporary Staffing, Staffing Services, Temporary Placement, and 28 others.

Current workplace

Bob Wiser's current company

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Meta
Meta
Analog Design Manager @ Meta | ex-Verily/Google[x], Stanford
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12 roles

Bob Wiser work experience

A career timeline built from the work history available for this profile.

Analog Design Manager

Current

Menlo Park, Ca, Us

Jul 2021 - Present

Director Of Technology Development

San Jose, California , Us

Sep 2020 - Jun 2021

Circuit Design Lead

Zurich, Ch

Led analog/mixed-signal integrated circuit design activities, and layout-vs-schematic methodology for monolithic electronic/photonic co-design, for two silicon photonics tapeouts in GF 90nm. Managed packaging partners (electrical and optical). Contributed to Python scripting for experimental setups, FPGA RTL, and embedded software development.

Jan 2019 - Aug 2020

Staff Hardware Engineer

Dallas, Texas, Us

Led an ultra-low power Bluetooth Low Energy chip development, achieving the smallest energy profile to actively push data receivable by standard smartphone wireless protocols, in the smallest BLE module form factor. Our work was presented at VLSI'19 in Kyoto.As Tech Lead, responsibilities also included creating product concept prototypes for executive leadership (Verily and Alphabet), managing software development, planning and overseeing usability trials, being the technical point of contact with a major hardware partner, and exploring internal and external partnerships.In addition, I managed an interdisciplinary team of engineers designing integrated circuits, electromagnetics, and systems/applications.

Mar 2016 - Jan 2019

Senior Hardware Engineer

Mountain View, Ca, Us

Variously contributed as integrated circuit block designer, chip lead, and systems/applications engineering research and development to support clinical testing for the glucose-sensing smart contact lens project.

Jul 2013 - Oct 2015

Contract Ic Design At Google[X]

Analog Circuits And Systems

Custom integrated circuit block design for the glucose-sensing smart contact lens electronics chip. Low power analog-to-digital converter design.

Oct 2012 - Jul 2013

Senior Staff Engineer, Mmw And Rf Ic Design

Jun 2012 - Oct 2012

Staff Engineer, Mm-Wave And Rf Ic Design

Jun 2011 - Jun 2012

Senior Engineer, Mm-Wave And Rf

San Jose, Ca, Us

(acquired by Silicon Image)

Jul 2008 - Jun 2011

Hardware Design Engineer - Intern

Internship involving system- and circuit-level design and simulation of a cyclic pipeline analog-to-digital converter.

Jun 2005 - Sep 2005

Hardware Engineer Intern

Santa Clara, Ca, Us

Jun 2003 - Sep 2003
3 education records

Bob Wiser education

Phd, Electrical Engineering

Stanford University

Bs, Ms, Electrical Engineering

Case Western Reserve University

Education record

Solon High School
FAQ

Frequently asked questions about Bob Wiser

Quick answers generated from the profile data available on this page.

What company does Bob Wiser work for?

Bob Wiser works for Meta.

What is Bob Wiser's role at Meta?

Bob Wiser is listed as Analog Design Manager @ Meta | ex-Verily/Google[x], Stanford at Meta.

What is Bob Wiser's email address?

AeroLeads has found 1 work email signal at @adecco.com for Bob Wiser at Meta.

Where is Bob Wiser based?

Bob Wiser is based in Palo Alto, California, United States while working with Meta.

What companies has Bob Wiser worked for?

Bob Wiser has worked for Meta, Ceremorphic, Inc., Pointcloud Inc, Verily Life Sciences, and Google[X].

How can I contact Bob Wiser?

You can use AeroLeads to view verified contact signals for Bob Wiser at Meta, including work email, phone, and LinkedIn data when available.

What schools did Bob Wiser attend?

Bob Wiser holds Phd, Electrical Engineering from Stanford University.

What skills is Bob Wiser known for?

Bob Wiser is listed with skills including Applicant Tracking Systems, Temporary Staffing, Staffing Services, Temporary Placement, Talent Acquisition, Technical Recruiting, Vendor Management, and Recruiting.

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