Senior Yield Engineering Technician
CurrentHelped validate and qualify first of its kind nano-prober designed for semi-chip de-processing and nano-probing of next-gen Intel processors. Develop debug and defect isolation prep techniques by using focused ion-beam and SEM tools to create TEM samples and allow nano-probing of latest Intel architectures, thus achieving faster data collection over fault analysis alone. Expert in areas of die sample prep to allow defect isolation on next-gen x86 processors and technologies - resolve complex yield limiters and manufacturing marginalities.Create and de-bug automation scripts for laboratory tool-sets to standardize and increase efficiency of semiconductor sample prep. Highly skilled and innovative engineering technician, well versed in semiconductor yield, sort, etest, manufacturing and failure analysis - develops methodologies and preparation guidelines for dissemination across Intel groups.