Ryan Kubiak Email & Phone Number

United States

Austin, Texas, United States

United States

Semiconductor Device Modelling

San Diego, California, United States

San Diego, California

Leading a world-class ASIC prototyping and emulation team. Providing innovative and industry solutions to minimize time to market and improve design quality, both HW and SW. Taking advantage of incredible opportunities to grow in both technical capacity and leadership ability.Driving exciting new developments in the FPGA Emulation space.

San Diego

Leading a world-class ASIC prototyping and emulation team. Providing innovative and industry leading solutions to minimize time to market and improve design quality, both HW and SW. Taking advantage of incredible opportunities to grow in both technical capacity and leadership ability.

San Diego, Ca

ASIC Emulation at Qualcomm

Cleveland, Oh

-- RTL Design for ASIC/FPGA: + Verilog / SystemVerilog + Designed multiple complex IP Blocks using SystemVerilog + Responsible for supporting various 3rd party IP Blocks + Responsible for Top-Level SoC implementation + Technical Lead for FPGA prototyping/emulation on three complex multi-million gate SoC designs + Use of UNIX operating system for design tools -- Extensive FPGA experience: + Altera Stratix IV / SignalTap implementation and usage on 5 unique development platforms + Xilinx Virtex 4 & 5 / Chipscope implementation and usage on 3 unique development platforms + Actel ProAsic3 implementation on 5 unique development platforms + Synplify Pro and Vendor Toolchain Synthesis + Created FPGA build scripts using a UNIX shell scripting language to implement an FPGA prototyping methodology which provided for a high degree of automation in the prototype build process, including the management of protected IP within the process.--Leadership Experience: + Technical Lead for Communications ASIC Hardware prototyping using multiple custom PCBs with Stratix IV FPGA + Technical Lead for Processor ASIC Hardware prototyping with Stratix IV FPGAs + Lead investigator for prototyping related anomaly resolution--IP competencies: + Triple Speed Ethernet, RGMII / SGMII / MII + DDR2/3, + Nand Flash + USB + SD Card + SPI + Local bus --ARM: Cortex A9 MPCORE, Cortex R4F, AXI, AHB, APB + PL301 Bus Interconnect + PL310 L2 Cache Controller + ARM assembly language programming + C programming + Code debugging using Realview, Lauterbach, WindRiver--Simulation / Verification: + Cadence Incisive + Mentor Graphics ModelSim/Questa + SystemVerilog for verification + OVM/UVM + ARM DSM model usage + Verification experience with both top-level and unit-level, including testplan creation + Perl / Shell Scripting

Printed Circuit Board Design (schematics/signal integrity/PCB layout)Digitial Design focus using ARM uP (ASIC and COTS), FPGA FPGA Emulation Board Design for 2M Gate ASIC ASIC validation support using ARM assembly and C code