Hardware Engineer
CurrentVentana Microsystems (Sept-2024 - present)It's a RISCV Project main responsibility being in IOMMU. Wave Computing (Nov-2022 - Jul-2024)It's a RISCV project with main responsibility being in CM block,Debug the RTL code in the Coherency Manager and RISCV AIA Block to identify and resolve any functional or performance-related issues.Collaborate with the verification team to debug and trace the RTL code, ensuring functional correctness and performance optimization.Perform code coverage analysis to ensure that the RTL implementation is thoroughly tested and all code paths are exercised. Conduct CDC (Clock Domain Crossing) analysis to identify and resolve any potential issues related to data synchronization across different clock domains.Perform LINT (Linting) analysis to identify and resolve any potential coding guideline violations and improve the overall code quality.