Sagar B C Email & Phone Number

• Sound knowledge of Digital System Design and CMOS VLSI design concepts • Skilled in developing SV and UVM-based constraint random verification environments for IPs.• Hands-on experience with AMBA 3 APB, AHB Lite, JTAG(IEEE1149.1 and IEEE1500), I2C, and SPI protocols.• Stronger understanding of ISA, Pipelining concept, Semiconductor memories, Microprocessor and Microcontrollers.• Skilled in RTL design using Verilog HDL and debugging RTL simulations.• Hands-on experience in testing and debugging device drivers of Texas AM65x evaluation board and Industrial kits.• Skilled in FPGA programming, Bash scripting, and C Programming.• Possessing knowledge of AXI, AXI Lite, and AHB 5 protocols.