Salil Kale Email & Phone Number

San Jose, California, United States

Comprehending the New product introduction, Bench Evaluation composed of ATE to Bench correlation,bench characterization and make necessary modifications. Performing Failure studies wherever applicable to feedback to Reliability. Work on Qualification of New Product validation.

Milpitas, California, United States

• Developed C++ application and NAND Assembly scripts for memory health testing and issue identification using commercial ATE.
• Designed 40% quicker Read algorithms while maintaining the same reliability.
• Performed Failure-Analysis (FA) to help reduce Defective Parts per Million (DPPM).
• Led and executed 6 full qualification runs on 3D NAND Flash, adhering to JEDEC standards to meet performance and reliability specifications while collaborating with cross-functional teams.
• Conducted testing on NAND memory in Serial and Parallel execution modes using NAND Assembly commands to ensure proper system-level functionality using commercial ATE.
• Implemented test cases to improve Die-Sort and improve NAND yield and reduce (DPPM) on Automated Testing Equipment (ATE).

Greater Los Angeles Area

Tested and verified electrical and optical properties of transistors and diodes made by the group. Electrical testing was performed using a probe station connected to test equipment like a signal generator and DSOs. Non-contact optical properties were tested using transient and steady-state photo-luminescence systems designed and characterized by me..

Bengaluru Area, India

• Led and executed 5 full qualification runs on NAND Flash Memory, adhering to JEDEC standards.
• Conducted Failure Analysis (FA) as necessary to optimize required screening processes.
• Optimized NAND Parameter-Trim to improve NAND performance and reliability.
• Developed system-level solutions with Product-Team to reduce error at high data rates.
• Developed shell and python scripts required for conversion of qualification data logs to Bigdata.

Powai, Mumbai

Designed a system to measure the EMG of person.Designed Beta multiplier based bias generators to provide Bias current to different circuits in the chipDeveloped a system to do temperature performance testing of Integrated Circuit

Master Of Science - Ms, Electrical Engineering, 3.21/4

Key Courses - Integrated Memory Devices and Technologies, VLSI System Design, Engineering Quantum Mechanics

Master Of Technology (Mtech), Microelectronics, 8.58

Activities and Societies: Part of Hostel-14 Maintenance Committee.Key Courses - VLSI Technology, VLSI Design, Solid State Device.

Bachelor Of Engineering (Be), Electronics And Instrumentation Engineering, 71.5%/100

Activities and Societies: Part of Robotics clubKey Courses - VLSI Technology, VLSI Design, Power Systems, Micro-Controller and Embedded.

High School, Pcm In Senior Secondary

Secondary and Senior Secondary. Board: CBSE