Kashif Salim work email
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Kashif Salim personal email
Professional Profile• Design and Development Leader in System Engineering, result oriented, not afraid to roll up his sleeves and take charge; key player throughout Product Cycle, end to end, from Concept to Launch. Technical Marketing Engineer for edge of technology Cavium 3.2 Terabit SDN switch; presenting features and providing on-site support for Hardware development• As a Hardware Manager delivered over 50 programs • At a given time, managed over 10 complex projects with technical challenges, cost sensitivity, and aggressive schedules• Delivered Cisco flag-ship products including CAT6K, Data Center Switches, UCS Blade Servers• Established and Developed new global teams; setup teams in Cisco, China • Drove PCB, ASIC, FPGA, connectors, memories and EDA tool vendors • Led Cross-functional activities; Design Methodology Lead, focusing on Electrical, Mechanical and Manufacturing aspects• Generated higher profit margins; driving the cost down working with GSM and cross-functional teams , generating higher profit margins• Excellent analytical, inter-personal, written and oral communication skills, including executive updatesExpertise• Technical leadership and Engineering team management. Technical Marketing• Program and Project Management • Cross-functional team leadership• CAD, Signal Integrity, Timing Analysis, Serdes, Power Integrity, Board Mounted Power• Team building; Recruiting and managing both in US and China• Manufacturing- DFM, Fabrication, Assembly, working closely with NPIE team• Project Scheduling, Budgeting and Resource allocation• Executive Communication and Status Reporting
Celestica
View- Website:
- celestica.com
- Employees:
- 14776
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Director Of Design EngineeringCelesticaSan Jose, Ca, Us
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Senior Technical Program ManagerAmazon Lab126 Apr 2021 - PresentSunnyvale, Ca, UsTPM for Alexa Platform team, developing boards to introduce new technologies and product ideas. Working with SoC vendors, fabrication and assembly houses. Supported Device team for stealth devices. Part of Cross-functional NTI and Pre-concept initiatives.Achievements:• NPIE for Augmented reality design platform• Involved in the first internal SoC design, helping team with chip and IP vendor interactions • Led the bring-up team at CM while supporting stealth device development; addressing challenges effectively• Review material readiness of proto and production ramp; primary contact between engineering, manufacturing, operations and suppliers• Build schedule to ensure development and testing of the product while working with cross-functional teams -
Manager Si EngineeringAmazon Lab126 May 2018 - Apr 2021Sunnyvale, Ca, UsLed a central team of SI engineers. Responsible for PCB design constraints, PCB Stack-up, Ball Maps, and SI/PDN simulations. Working with EDA vendors for tool selection and methodology. Working with the Process Enhancement team to increase productivity.Achievements:• Team delivered SI/PDN for top seller Alexa products, E-readers, Tablets and future products• SI Methodology for LPDDR5 for consumer products• Worked with SoC vendors to reduce PCB cost, meeting SI and PDN requirement• Worked with fabrication vendors to ensure robust stack-up selection system• Led team to implement SiP technologies; worked closely with SiP vendors and cross-functional teams to meet design requirements, keeping design constraints.• Team scripted Allegro CMS generation to meet SI requirements, OrCAD automatic checks and auto-generation of Power Tree
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Senior Si EngineerAmazon Lab126 Feb 2017 - Apr 2018Sunnyvale, Ca, UsResponsible for SI/PDN for Alexa and tablet products. Running simulations for LPDDR3, generating CAD constraints, layout and schematic reviews
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Senior Staff Technical Marketing EngineerCavium 2014 - Jan 2017Enabled customers and ODMs in USA and Taiwan with System Design and Development with state of the art 3.2 Terabit SDN Asic. Part of the Technical Marketing team, presenting Product features and System Development Requirements. Provided preliminary and On-site Technical support during Schematic Development, Signal Integrity analysis, CAD design, and board bring-up. Achievements:• Toured ODMs in Taiwan, making presentations and installing confidence in the product• Enabling customers to be system ready at the arrival of the Chip, meeting time to market• Part of Hardware team for in-house and customer site bring-up of the brand new Switch• Worked with local and global sales team to ensure robust customer support network • Technical writing and presentation of Hardware Manual and new Design Solutions • Part of the Marketing Team, winning new customers in US
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Manager, Hardware EngineeringCisco 2006 - Oct 2014San Jose, Ca, UsLead highly motivated design teams, both in US and overseas. Provided Signal Integrity analysis, Power analysis and lab measurements at system level for PCIE, XAUI, XLAUI, DDR3 and other interfaces. This included Verification plans, VNA measurements, Serdes selection, Constraint Management, Stack-up generation and more. Delivered high quality complex PCB design while working with cross-functional teams, maintaining aggressive schedules. Responsible to deliver Power System Design and Simulation. Scheduled and allocated resources for current, future and Value Engineering programs. Provided regular status communications to cross-functional and executive teams.Achievements:• Delivered Design, Signal Integrity, CAD, Power solutions to Switch and Server products, including systems generating revenues of over $1 billion per quarter • Delivered complex PCB designs with layer count ranging from 14 layers to 30 layers, complex SI constraints and over thirty power rails on a single board• Reduced Design Cycle on average by 6 to 8 weeks while working closely with contract vendors for 24/7 SI and CAD services• Technical Lead for Nexus N2K switches. Responsible for schematic capture using Cadence Concept, layout supervision using Allegro, board bring up, validation and qualifications • Setup Cisco China CAD and SI operation; recruited and managed the team• Ensured SI Packaging Constraints like Return loss, Jitter, Amplitude, Tolerance, Chanel Compliance, Pin Optimization, Power Integrity are met for end-to-end solution• Engaged with EDA vendors to align them with company process and methodology• Resolved Manufacturing issues with vendors, working on DFM and PCB technology matrix• Lead first shipped project in Cisco based on HDI technology• Modified design review system for Board Mounted Power -
Hardware EngineerCisco 1998 - 2006San Jose, Ca, UsPerformed detailed system level Signal Integrity analysis and checks on Cisco switches, interfaces ranging from DDR to high speed Serial links. Actively involved in different cross-functional efforts at both BU and company level. Achievements: • Successfully ran pre and post layout Signal Integrity simulations for back planes, servers, line cards and fabric cards, involving ASICs, connectors, FPGAs and memories. • Enhanced and documented SI approval process for PCB, with special emphasis on DDR memories and serial-links • Evaluated both SI and CAD tools to improve design cycle. These tools were later adopted by the group. • Actively participated in process enhancement and automation while interacting with CAD and SI tool vendors • Involved in Pin assignments and partitioning of Cisco custom ASICs • Approved stackup for desired thickness and impedance involving Manufacturing. • Worked with Manufacturing team to ensure DFM while focusing on new areas of improvement for Power Integrity • Successfully resolved Signal and Power Integrity issues in the lab • Lead Cross-functional efforts at BU level, which were later taken up to Cisco level. • Actively involved in design feasibilities for new products, ensuring SI and PI constraints are met within physical limitations of the system
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Application EngineerIms 1994 - 1998Worked as Application Engineer to provide engineering services including CAD with strong SI, EMC and DFM focus.Achievements:• Successfully interacted with customers to understand CAD and SI needs of their projects• Developed system for inter-acting with over-seas team• Enhanced company process and worked with tool vendors for improvement• Routed tons of boards using Allegro and Specctra Auto-router while maintaining DFM, SI and EMC• Closely worked with customers for both OrCAD schematics and Allegro PCB capture• Trained local and over-seas CAD engineers
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Account ManagerDigital Solutions 1993 - 1993Part of sales team; value added reseller for computers and peripherals
Kashif Salim Skills
Kashif Salim Education Details
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Wayne State UniversityElectriacal And Computer Engineering -
Ned University Of Engineering And TechnologyComputer System Engineering
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Courses
Frequently Asked Questions about Kashif Salim
What company does Kashif Salim work for?
Kashif Salim works for Celestica
What is Kashif Salim's role at the current company?
Kashif Salim's current role is Director of Design Engineering.
What is Kashif Salim's email address?
Kashif Salim's email address is sa****@****sco.com
What schools did Kashif Salim attend?
Kashif Salim attended Wayne State University, Ned University Of Engineering And Technology, Courses.
What skills is Kashif Salim known for?
Kashif Salim has skills like Signal Integrity, Asic, Pcb Design, Fpga, Cross Functional Team Leadership, Hardware, Design For Manufacturing, Embedded Systems, Manufacturing, Eda, Debugging, Testing.
Who are Kashif Salim's colleagues?
Kashif Salim's colleagues are Otilia Craciun, Amir Mahmud, John Liu, Wei Li, Wenliang Zhang, Celestica Yusoff, Nur Shahirah Ahmad Jailani.
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