Over last 20+ years, done direct engineering enablement of worldwide OEMs and CSPs, taking their x86-based products from definitions to developments to TTM launches. Skilled in processor & platform architectures, platform debug, engineering issue resolution, integrated marketing, go-to-market strategy, and strategic partnerships. Strong engineering professional with a Master of Engineering (M.Eng.) focused in Electrical and Electronics Engineering from California State University.
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Cloud Platform ArchitectIntel Corporation Apr 2021 - Mar 2023Santa Clara, California, Us• Lead engineering issues Burndown taskforces for tier-1 customer's General & Confidential fleets with minimal impact to mutual $1B+/year Data Center business• Reduced issue resolution time by 50-80% with year 2022 ending with zero showstoppers.• Drove internal process improvements for upcoming product updates, leading to removal or reduction of customer’s fleet downtimes with data security intact. -
Enterprise Ai Strategy & Solutions EngineeringIntel Corporation Apr 2017 - Mar 2021Santa Clara, California, Us• Drove $multi-million Enterprise adoption of IA-based Hybrid/HCI, Data Analytics & AI solutions.• Scaled 4 top-tier North America OEMs’ sales by partnering with CSPs, GSIs & NSIs for solutions, built on mainstream-to-disruptor ISVs.• Co-developed with Field, Fiscal Year investments & growth metrics by prioritizing Cloud workloads from Edge to Data Center.• Exceeded solution offerings and financial KPIs with 2 top OEMs.
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Xeon 1S/2S Platforms Applications Engineering For Oems & CspsIntel Corporation Aug 2000 - Mar 2017Santa Clara, California, Us• Owned multi-domain customer platforms engineering development on Xeon 1S/2S roadmap.• Drove TTM (Time-To-Market) launches by developing close coordination on risks/gaps anticipation and issue closures.• Initiated and executed creative pull-in of strategic customer launches enabling early revenue streams against competition.
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Xeon Platform Execution Team (Pxt) LeadIntel Corporation Apr 2016 - Oct 2016Santa Clara, California, Us• Owned Xeon-D PXT from planning phase0 to closure.• Collaborated with ~30 engineering, business & finance teams on PXT’s charter, targets and schedule.• Developed multi-segment customer platform enabling & launch plans.
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Apple Field Applications EngineeringIntel Corporation Apr 2014 - Oct 2014Santa Clara, California, Us• Drove Xeon® D – 1st Xeon SoC as a cost-competitive, high-performance Compute & Storage solution for Apple’s 16exabytes Data Center.• Held weekly engineering management F2Fs on Xeon architecture & adjacent Intel products customized adoption. • Resolved showstopper issues with experts on RHEL regression, Oracle DB & HTA (high-ambient temps) Data Center Management.
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Financial Services (Fsi) Solutions SpecialistIntel Corporation Mar 2005 - Sep 2005Santa Clara, California, Us• Supported 6 BDMs (Business Development Managers) on FSI’s IT requirements to influence IA.• Led technical and workload discussions, and drove solutions with Fellow Travelers (Dell, HPE) after determining engineering requirements.• Collaborated with BUs to complete solution stacks and customer proof points.• Improved SOW/wallet share by proactively delivering customized TCO and Benchmarks.
Samar S. Education Details
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California State University-SacramentoElectrical And Electronics Engineering -
Panjab University, ChandigarhElectrical And Electronics Engineering
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Panjab University, ChandigarhElectronics And Communications Engineering
Frequently Asked Questions about Samar S.
What is Samar S.'s role at the current company?
Samar S.'s current role is Enterprise/Cloud Technical Program Management, Cloud Platform Architect, Engineering Issues Lead, Intel Retiree after 32 Years.
What schools did Samar S. attend?
Samar S. attended California State University-Sacramento, Panjab University, Chandigarh, Panjab University, Chandigarh.
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