Sambit Bohidar Email & Phone Number

SENIOR TEST DEVELOPMENT ENGINEER CSG GROUP (Jun 2007 - Mar 2018)• Worked with Clock and Signals Synthesis group on high speed/low jitter clock distribution/generation products and DDS products• Extensive experience on the Teradyne Ultraflex and LTX Fusion Hfi test platforms• Experience with testing PLLs, VCOs, RTWOs, different types of output drivers such as CMOS, LVDS, LVPECL, CML• Implemented complete test solutions from having input for DFT with designers prior to silicon tapeout through product release• ATE hardware DIB design/schematic capture, and involvement in layout techniques for high speed board design• Developed digital patterns for ATE using Verilog, and SCAN pattern implementation/debug• Software experience with Teradyne IGXL, VBA, LTX enVision and Cadence• Full product Qualification, Characterization over PVT, Datasheet limit generation, Correlation/Repetability testing, and Production program release along with CPK analysis• Experience with high speed pattern based digital testing in order to increase test coverage with minimal test time impact• Extensive experience debugging hardware and software for boards and programs designed by other engineers• Implemented test time reduction and test program/coverage analysis post release• Worked with other test engineers in a supervisory role as well as managed several co-op students and interns• Engineering support for production test floor to help mitigate issues and keep products running smoothly• Managing full time employees and co-opsTEST DEVELOPMENT ENGINEER ADC group (May 2005 – Jun 2007)• Worked with High speed converter group on ADCs and DACs.• Experience in signal processing and linearity testing, fuse trimming • Probe and package test on Teradyne Catalyst test platform

Listed skills include Analog, Debugging, Testing, Mixed Signal, and 20 others.