Samir Chitnis work email
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Samir Chitnis personal email
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CPU RTL design engineer with experience on out of order execution unit and Load-Store unit. Also worked on DV for out of order execution unit.
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Cpu Core Rtl DesignAmd Nov 2020 - PresentSanta Clara, California, Us -
Cpu Core Design EngineerMarvell Semiconductor Oct 2019 - Nov 2020Santa Clara, Ca, UsRTL design team member for ThunderX ARM core. -
Rtl Design Engineer In Configurable Fabrics GroupIntel Corporation Jan 2019 - Sep 2019Santa Clara, California, Us -
Cpu Rtl Design EngineerIntel Corporation Sep 2016 - Jan 2019Santa Clara, California, Us -
Staff EngineerSoft Machines Apr 2016 - Sep 2016Santa Clara, Ca, UsWorking on Load-Store unit RTL -
Member Of Technical StaffAmd Jul 2015 - Mar 2016Santa Clara, California, UsRTL team member of out order execution and retirement unit for K12 ARM core. Apart from writing logic in Verilog:- Worked with physical design team on RTL changes needed for timing closure. - Did power analysis and worked on solutions to improve power. -
Senior Design EngineerAmd Jul 2013 - Jun 2015Santa Clara, California, UsRTL team member of out order execution and retirement unit for K12 ARM core. Apart from writing logic in Verilog:- Worked with physical design team on RTL changes needed for timing closure. - Did power analysis and worked on solutions to improve power. -
Design Engineer 2Amd Feb 2013 - Jun 2013Santa Clara, California, UsRTL team member of out order execution and retirement unit for K12 ARM core. -
Design Engineer 2Amd Nov 2010 - Jan 2013Santa Clara, California, UsFunctional Verification of Execution and Scheduling unit of bulldozer core:- Develop and maintain C++ testbench components : checkers, monitors and fake models for other units.- Develop and maintain System Verilog checkers.- Write Assertions in System Verilog and Coverage in System Verilog and C++.- Unit and core level RTL debug using waveform tools.- Test planning for various micro-architectural features. Core Level Functional Verification:- Test planning for core level features. - Write directed tests in x86 assembly language. -
Grader, Computer Architecture And Logic Design CoursesUniversity Of Southern California Jan 2009 - Nov 2010Los Angeles, Ca, UsGrader for courses taught by: Prof. Gandhi Puvvada and Prof.Monte Ung.Responsibilities: - Grading the homeworks and exams.- Help the students with the course work.Graded following courses: - Computer Systems Organization (EE457): Register transfer level machine; organization and detailed implementation of non-pipelined and pipelined processors; cache and virtual memory-Introduction to Digital Circuits(EE201): Verilog-based design, simulation, and implementation in FPGA; timing analysis; simple CPU design; Synchronous design of datapath and control-Introduction to Digital Logic (EE101): Boolean function synthesis; combinational logic devices; sequential circuits; state machine design and implementation. -
EngineerHoneywell Automation India Limited. Jul 2006 - May 2008Charlotte, North Carolina, Us- Programming of control logic and human machine interface for DCS and PLCs.- Designing the hardware configuration and connection diagrams for DCS and PLC. - Preparing design documentation for DCS and PLC projects. - Onsite support for plant commissioning activities.- Project co-ordination with front office engineers in Europe. -
EngineerHoneywell, United Kingdom Oct 2007 - Mar 2008- Part of the committee that designed the project wide standards (control and human machine interface) for batch processing.- Design Engineering for oil refinery project. - Design and document the standards for control loops.
Samir Chitnis Skills
Samir Chitnis Education Details
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University Of Southern CaliforniaComputer Engineering -
University Of MumbaiElectrical Engineering
Frequently Asked Questions about Samir Chitnis
What company does Samir Chitnis work for?
Samir Chitnis works for Amd
What is Samir Chitnis's role at the current company?
Samir Chitnis's current role is CPU Core RTL Design at AMD.
What is Samir Chitnis's email address?
Samir Chitnis's email address is si****@****hoo.com
What schools did Samir Chitnis attend?
Samir Chitnis attended University Of Southern California, University Of Mumbai.
What are some of Samir Chitnis's interests?
Samir Chitnis has interest in Kindle, Bollywood, Coffee, Design, Nfl, Physics, Football (Us), Computer Science, Science, Education.
What skills is Samir Chitnis known for?
Samir Chitnis has skills like Verilog, Systemverilog, Vhdl, C++, Fpga, Computer Architecture, Functional Verification, Logic Design, Microprocessors, Control Systems Design, Debugging, Digital Signal Processors.
Who are Samir Chitnis's colleagues?
Samir Chitnis's colleagues are Tatum Hartwig, Antonio Chaides, Victor Spiewak, Jovan Mihajlovic, Jessie Gao, Biping Wu, Bala Sai Kosuri.
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