Sandip Rajput Email and Phone Number
Summary :-- VLSI Design Automation Technical Lead with 8+ years of experience in Design Integration, Verification tools/flows and methodology solutions. - Have seen around 7 project and 4 different generation family of products through tape-in involving tech readiness, path clearing, SOC bring up execution and support. - Lead a team of around ~7 people. Also trained 5 interns. Highlights :-- Powerful technical, behavioral and leadership skills, positive attitude and results orientation. Excellent commitment and dedication.- Good with stakeholder management- Design quality, IP reuse, IP Packaging, SOC integration experience.- Expertise in advanced Perl, Python, Make, Shell programming. - Expertise in Connectivity, Continuous integration, Build and Release, Version control (GIT, Perforce, Bit-Keeper), GitHub. - Experience in Register generation, Repeater/Isolation/Level Shifter insertion. - Experience with RTL Generation, Compilation and Hand off. - Expertise in Hardware design kit development, delivery and Front End methodology. - Exposed to leading edge Front end flow technologies from multiple vendors.- Exposed to standard interfaces like Intel standard fabric and interfaces, AXI. - Experience with Compile, Simulation, Debug, Lint, FPV, Emulation, Low power flows.- Expertise in SOC project bring up and technical readiness.- Have traveled to US (CA, OR) and Israel (Haifa) multiple times for work. - Design execution, Flows/Methodology support for cutting edge 10nm server products, Graphics, Core. - Systematic Software development, Design Automation, Product/Solution Management and ownership. - JIRA, Agile Scrum and Kanban methodology, Code Collaborator and co-development for complex solutions with large team of developers..
Microsoft
View- Website:
- microsoft.com
- Employees:
- 189892
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Principal Front End Cad ManagerMicrosoft Sep 2023 - PresentBengaluru, Karnataka, India -
Front End Cad Methodology Manager And Global Domain LeaderGoogle Jul 2019 - Sep 2023Bengaluru Area, India- Pioneered Converged SRDL based Control/Status register solution across SW/RTL/DV/Arch- Pioneered Industry edge SoC integtration, connectivity and IPXact based packaging. - Started as One Man army for FE-CAD, Built a team of 17 (FT+Contractors) and Own global Design Methodology charter- Release Methodology champion and SPOC for all the FrontEnd - Introduced innovative E2E push-button Build/Release and Qualification flow for RTL/DV/DFT/Emul/SW/PD releases. Driven from concept to reality. - Cross domain solutions POC enforcing PD/DFT Release quality of RTL.- Agile/Scrum advocate and champion in CAD/Methodology teams.- Structured planning and execution through OKRs definitions/reviews, CAD roadmaps, Tech Readiness, headcount gaps/ hiring reviews and Progress reviews. 100% Positive Manager feedback.- Drove converged Memory optimization and generation flow- Significant expertise/exposure towards PD Partitioning, Feed-throughs, Port punching, hierarchical filelist generation, cdc abstract reuse, RTL Synthesis, Lint/CDC, VCLP flows. - Hands on exposure to early stage of Silicon Infra solutions (Kubernates/Jenkins/Filestore/RTDA-NC/FlowTracer, )- Critical contributions to the success of multiple Generation of Tensor chips in Pixel (6/7/8...) -
Engineering ManagerIntel Corporation Aug 2018 - Jul 2019India -
Technical Lead Design Validation/Build Flows FrameworkIntel Corporation Jun 2013 - Jul 2019- Worked on improving fast soc integration methodology streamlining front end flow.- System level development for Design processing framework and owned multiple solutions from India site.- Exposed to leading edge technologies for design compilation, simulation, lint, cdc, low power testing,formal property verification, emulation flows and got rare opportunity to work on industry standard tools from multiple vendors.- Experience in IP packaging, reuse and seamless SOC integration.- Provided project execution support Broadwell, Skylake and other next generation family of Server, Graphics, Client and Phone products. -
Design Integration And Connectivity Solution LeadIntel Corporation Mar 2012 - Aug 2014Bengaluru Area, India- Developed next generation flow for design connecting and hierarchy generation tool.- Experience using Intel internal and Industry standard design connectivity solutions and debug expertise. - Participated and drove design bring up for Micro server products and multi generation graphics products and improved design quality for successful paranoia and timely tape-ins.- Exposed to standard interfaces AXI, IOSF, PSF and seamless SOC connectivity. -
Design Automation EngineerIntel Corporation Jun 2011 - May 2012Bengaluru Area, India- Expertise in continuous integration and multiple version control systems.- Exhaustive development, pilot and deployment of next generation continuous integration system for Intel Gen graphics projects. - Single point of contact for graphics project bring up and technical readiness for India team. Improved Build Framework for 2 step compile and library reuse. - Contributed to haswell, broadwell and skylake graphics project execution. -
Graduage Technical InternIntel Corporation May 2010 - Apr 2011Bengaluru Area, India- Owned development for continuous integration build framework and pilot on Gen graphics projects.- Shared responsibility of Gen graphics version control system administration and maintenance. - Owner, developer and single point of contact for Graphics Validation Build framework.
Sandip Rajput Education Details
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Nirma Institute Of TechnologyElectrical, Electronics And Communications Engineering
Frequently Asked Questions about Sandip Rajput
What company does Sandip Rajput work for?
Sandip Rajput works for Microsoft
What is Sandip Rajput's role at the current company?
Sandip Rajput's current role is Principal Front End CAD Methodology Manager @ Microsoft | Ex Google Intel.
What schools did Sandip Rajput attend?
Sandip Rajput attended Nirma Institute Of Technology, Gujarat University.
Who are Sandip Rajput's colleagues?
Sandip Rajput's colleagues are Aditya Sharma, Meriem Lahrache, Krizzialyn Dungca, Shaik Bakshu, Shamheed A, Chris Bain, That Guy.
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Sandip Rajput
Avp @ Hdfc Bank | Fintech | Digital Payments | 2Xaws | Aws Architecture | Devops/Devsecops Architecture | Terraform | Python | Docker | Sonarqube | Salesforce | MulesoftThane2learningmate.com, hdfcbank.com
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