Vast experience in Semiconductor Chip Design Engineering and Techno-managerial leadership. Expertise in front end design, micro architecture, RTL, SOC integration, verification, SystemVerilog, UVM. Varying degrees of domain knowledge in processors, bus interfaces, networking, communications, automotive, DSP, video and display technologies. Worked on AMBA, DDR, PCIe, Ethernet, Serdes, USB, Cache, DMA controllers, Network-on-chip (NoC). Good interfacing knowledge related to Synthesis, STA, DFT and Physical Design. Exposure to system level design, post silicon validation. Effective leadership: managed medium sized projects and teams independently. Hiring, building teams, grooming and mentoring. Proactive, pioneering, volunteering, taking initiatives. Excellent communication, presentation and interpersonal skills.