Satesh Kumar Email & Phone Number

-Having 3.9 years of experience in the Electronics industry(Samsung India electeonics),6 months of experience in physical design domain(RV-VLSI design center).-Looking for an opportunity in physical design domain-Good knowledge in Physical Design Flow: Floor plan,Placement,CTS and exposure to static timing analysis.-Floor plan on IC compiler with high macro count by analyzing the data flow diagram.-Power Planning for the same floor plan by setting proper metal tracks (DVD,VSS) for standard cell placement by considering EM & meeting IR drop.-Proficient Knowledge in STA regarding concepts such as MCMM,OCV analysis, CRPR,clock skew,Time borrowing,Signal Integrity & Fixing timing violation.-Performed clock tree synthesis for all clock domain in the design.-Having good knowledge in TCL scripting & Linux commands.-Conducting daily review meeting to improve the performance of the project.-Work as Failure analysis engineer to analyze & Solve issues by developing corrective action.-

Listed skills include Basics Of C, Linux, Synthesis, Circuit Analysis, and 18 others.