Scott Bittle Email & Phone Number

California, United States

Digital Logic Design (FPGA. ASIC and System)HDL/RTL, IP and so on...

Charlotte, North Carolina, Us

San Jose, California, Us

Centennial, Colorado, Us

• Provided pre-sale through post-sale technical support for a wide range of customers using FPGA silicon, CAE software and Intellectual Property.• Conducted technical presentations and technical training.• Managed/coordinated technical personnel within Arrow and Arrow’s suppliers to resolve customer issues.• Covered Altera, National Semiconductor and ST Micro lines plus others.• Supported Arrow’s “Custom Logic Solutions” group with ASIC design efforts (Altera HardCopy, On Semi, Triad Semiconductor plus others.)• Extensive Altera training and certification in Quartus II tool flow and IP (e.g. PCIe, DDR2, VIP Suite etc.); “Solution Sales” training; “Arrow Centralized Training” for FAEs and TSEs.

All NDA - sorry :).

Catching up on life before the next "big thing."

Burlington, Ma, Us

Highlights:• FPGA/RTL designer on a bi-coastal design and management team responsible for specifying and implementing a next generation PCIe audio recording, editing and signal processing platform. Responsible for design and RTL coding of three key modules. Overall design implemented in two large Altera FPGAs (Arria and Stratix II.)• Designer of the Venue HDx option card. Sole designer of this option card. Specified, designed and verified Altera FPGA RTL and board-level schematics. Brought option card up in lab and oversaw regulatory compliance of the option card.• Co-designer of the Venue FWx option card.• Hardware Design Lead on a team with Marketing, Software Engineering, and Program Management personnel tasked with defining a new live sound interconnect standard.Based design on a Micrel “AnyRate” CDR and a Xilinx FPGA – design exceeded cost/performance expectations. Worked with a senior board-level designer to implement schematics and verify the design. Created all synthesizable RTL and testbenches to verify Transmitter and Receiver logic modules.• Engineering Lead for a 0.35-micron standard cell ASIC. Managed the technical contributions of two other design engineers and three verification engineers, consultants, and ASIC vendor; was primary contact for Director of Program Management and ASIC vendor team. Specified, designed, and implemented VHDL for a source-synchronous TDM datapath subsystem used for real-time data transfer.• Technical liaison for Digidesign and its parent company, Avid Technology in Massachusetts. Promoted technology reuse and resource sharing.• Specified and designed the "Pro Tools|24 MIX" PCI Expansion Boards, Digidesign's second generation PCI based DSP cards based on six Motorola 56301 DSPs, a DEC/Intel 21150 PCI Bridge, and proprietary TDM Bus technology.• Worked with a cross-functional team to architect and implement the first generation of Digidesign's PCI Bus DSP accelleration/expansion boards.

While attending graduate school I worked as an instructor at CSUC teaching labs and lectures and continued doing commercial design work for my previous employer and others.

https://www.technipfmc.com/en/what-we-do/subsea/RoboticsImplemented a multi-channel PWM amplifier for a bi-lateral force-feedback manipulator system. Logic done in a Xilinx FPGA that drove the power stage directly. Linear and PWM power supply design. Regulatory compliance for overall system.

Msee - With Distiction, Digital Electronics And Signal Processing

Bsee, Electronics Engineering; Minor In Mathematics

Education record

Certificate In Audio Engineering, Hi-Fidelity Audio Recording Of Live Classical Music