Brandon Schenck

Brandon Schenck Email and Phone Number

Senior Principal Engineer @ Marvell Technology
Rochester, MN, US
Brandon Schenck's Location
Rochester-Austin, Minnesota Area, United States
Brandon Schenck's Contact Details

Brandon Schenck personal email

n/a

Brandon Schenck phone numbers

About Brandon Schenck

I am a licensed Professional Engineer (PE) in Minnesota with over 20 years of experience as an ASIC and semi-custom technical leader at Marvell, Averasemi, Globalfoundries,and IBM. I’ve lead technical efforts to build technology-leading designs for customer ASICs, and I am using that experience to lead new complex customer designs in 5nm and 3nm. I have a strong background of technical leadership in all aspects of ASIC and semi-custom large-scale design, including rtl definition, simulation, DFT, physical synthesis, clocking and physical design, static timing analysis, and physical optimization of large, complex designs. I am extremely motivated in my career and passionate about my work, and I am always exploring new opportunities and challenges.

Brandon Schenck's Current Company Details
Marvell Technology

Marvell Technology

View
Senior Principal Engineer
Rochester, MN, US
Website:
marvell.com
Employees:
6147
Brandon Schenck Work Experience Details
  • Marvell Technology
    Senior Principal Engineer
    Marvell Technology
    Rochester, Mn, Us
  • Marvell Technology
    Senior Principal Engineer
    Marvell Technology Apr 2023 - Present
    Rochester, Minnesota, United States
  • Marvell Technology
    Principal Engineer
    Marvell Technology Nov 2019 - Apr 2023
    Rochester, Minnesota Area
    Marvell has completed acquisition of Avera Semi! This is an exciting step in our journey from IBM Microelectronics, which started with the GlobalFoundries acquisition in 2015 and then Averasemi last year, in preparation for this merger. We bring to Marvell a 25-year heritage of delivering leading solutions to silicon customers.I am currently a technical lead for customer ASIC programs in 14nm, 7nm, 5nm, and 3nm technologies.
  • Avera Semiconductor
    Principal Member Of Technical Staff
    Avera Semiconductor Nov 2018 - Nov 2019
    Rochester, Minnesota Area
    Design lead and customer engagement manager for ASIC solutions team at newly formed Avera Semiconductor, a new subsidiary of Globalfoundries. My ASIC solutions experience spans industries from wired and wireless infrastructure, AI and machine learning, aerospace and defense, and datacenter applications.
  • Globalfoundries
    Principal Member Of Technical Staff - Design Lead And Engagement Manager
    Globalfoundries Dec 2015 - Nov 2018
    Rochester, Minnesota Area
    Chip technical lead and Client Interface for ASIC Design Center in 14nm and prior technologies.
  • Ibm
    Technical Lead And Client Interface, Advanced Silicon Design
    Ibm Jun 2012 - Jun 2015
    Rochester, Minnesota Area
    Chip technical lead and Client Interface for IBM ASIC Design Center in 45nm, 32nm and 14nm technologies. Currently helping lead the technical effort to build the first IBM customer ASIC in 14nm (FX-14) technology.
  • Ibm
    Advisory Clock Engineer
    Ibm Jan 2007 - Jun 2012
    Full design experience, including: logic design, DFT, timing analysis/closure, physical design and integration, power, simulation, logic synthesis, verificationExpertise in design of clock grid methodologies - fully integrated designs for low skew/low power clocks and complex synchronous designsFamiliar with 45nm, 32mn and 22nm technologies, both ASIC and Custom methodologies. Also helping define tool and methodology flows for 14nmDevelopment of custom processor clocking methodologies, including POWER systems. Experience with DDR, PCIE, SERDES and other I/O architectures.Clock lead for Microsoft XBOX 360 project, developing a custom gaming clock design; Clock lead for Bluegene/Q System, one of the fastest and most energy-efficient supercomputers in the worldFamiliar with IBM Design tools (ChipBench, Einstimer) and Cadence tools (Virtuoso, Finale, Encounter). Some exposure to Synopsys tool set, mainly Primetime and Design Compiler.Active in the IP and Patent Process - Author of multiple patent applications currently on file or issued with USPTO.IBM Rochester New Hire Network President and IBM Club Director - local climate initiatives.
  • Ibm
    Hardware Design Engineer
    Ibm Jan 2004 - Jan 2007
    Rochester, Minnesota Area
    Hardware design engineer, focus on design-for-test logic and pervasive clocking structures. Supported multiple standard product and custom ASIC parts.
  • Ibm
    Hardware Design Engineer
    Ibm Jul 1999 - Aug 2004
    Rochester, Minnesota Area
    Worked one co-op and 4 summer internships over the course of 5 years with the same hardware department at IBM. Supported both internal and external designs, focusing on ASIC clock and logic design with front- and back-end teams.Responsible for simulation and verification of multiple clock, test and self-test environments.Exposure to JTAG and Boundary Scan designs and the test and clocking structures.

Brandon Schenck Skills

Timing Closure Physical Design Logic Design Static Timing Analysis Asic Timing Vlsi Circuit Design Verilog Tcl Vhdl Hardware Design Perl Clock Tree Synthesis Electrical Engineering C Scripting C++ Hardware Architecture Debugging Cmos Soc Microprocessors Processors Semiconductors Eda Simulations Computer Architecture Logic Synthesis Testing Dft Ic Pcie Functional Verification Primetime Cadence

Brandon Schenck Education Details

Frequently Asked Questions about Brandon Schenck

What company does Brandon Schenck work for?

Brandon Schenck works for Marvell Technology

What is Brandon Schenck's role at the current company?

Brandon Schenck's current role is Senior Principal Engineer.

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What is Brandon Schenck's direct phone number?

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What schools did Brandon Schenck attend?

Brandon Schenck attended Michigan State University, Michigan State University, Lansing Eastern High School.

What are some of Brandon Schenck's interests?

Brandon Schenck has interest in Social Services, Skiing (Snow And Water), Anything Else Outdoors.

What skills is Brandon Schenck known for?

Brandon Schenck has skills like Timing Closure, Physical Design, Logic Design, Static Timing Analysis, Asic, Timing, Vlsi, Circuit Design, Verilog, Tcl, Vhdl, Hardware Design.

Who are Brandon Schenck's colleagues?

Brandon Schenck's colleagues are Burak Antikaci, Zhongxia Shang, Efrat Isack, Tian He, Ayuj Verma, George Chien, Ming Yee.

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