Scott Hurt Email & Phone Number

Albuquerque, Nm, Us

East Aurora, Ny, Us

Manage FPGA firmware design engineering group for Space and Defense Applications. Including development of firmware, verification and validation procedures and processes for radiation tolerant, high-reliability, man-rated space applications. Development of firmware for satellite avionics including INMAR SB-SAT.

East Aurora, Ny, Us

FPGA firmware design team lead for the Space Launch System (Space Shuttle replacement) Thrust Vector Control. Using MATLAB/Simulink to model closed loop control of actuators (including digital filtering) for space applications (manned and unmanned qualified) and implementing the logic in FPGAs and support circuitry including creation of VHDL self-checking simulation test bench. FPGA design for Ethernet to SpaceWire. Telemetry and control over Ethernet. Video over PCIe. Currently working FPGA designs in Actel/Microsemi RTAX and RTSX and Xilinx Virtex 5, Spartan 6, and Zynq devices.

San Jose, Ca, Us

Design and verification of FPGA based soft functions for embedded processor systems primarily in VHDL. Designing Ethernet based functional blocks and supporting example systems and documentation. Working with some upper level protocols such as TCP/IP and UDP. Verification in simulation and validation in hardware testing including some formal validation at UNH. Performing some customer system support. I am also the Embedded Ethernet design project lead. Processors used are PowerPC, ARM, and Xilinx MicroBlaze.

Charlotte, North Carolina, Us

Electronic system design and qualification for military vehicles primarily aviation (including fighters, bomber, cargo and surveillance). Experienced in all aspects including R & D, proposal generation, system design and test, transition to production, field return and depot level debug and repair (including at customer site in Japan), customer and co-producer training (domestic, Israeli, and on-site in Denmark), flight-line debug, design review and other formal presentations, technical project lead with some program management duties (including budget, schedule, engineering and technician headcount responsibilities). Held DOD secret clearance. Design experience includes: system level to circuit card and PWB layout and routing to programmable device design. 2 ASIC designs including library based and VHDL based. Processor based card designs including TI DSP and graphics processors, Intel 80960, 87C196, MIL-STD_1750, various PowerPC, bit slice and custom micro-sequencers. Complex FPGA designs for digital video and LCD interfaces as well as custom back plane bus designs and glue logic. Serial buses including MIL-STD-1553 (-,A,B), RS422/485, and Ethernet. LCD display head design including LCD heaters and temperature sensors (patent # 6089751), display driver interface, backlight control, bezel button interface, and NVIS compatibility. Test and support equipment design. Low-level assembly, microsequencer, and C Code program design. Power analysis and heat dissipation. Reliability prediciton. extensive self-test and diagnosis built in to designs. Validation and verification includes production test with temperature, humidity, and vibration testing. Full military qualification testing including EMI, environmental, end of life, explosive atmosphere, NVIS compatibility, etc. Worked with sub-system suppliers for bezels, backlights, LCD glass assembly, backplane, etc. Familiar with formal document and drawing release and change control processes.

Bsee, Electrical Engineering

Bscs, Computer Science

Education record