Staff Engineer
CurrentDesign network switch IC packet pipe architecture.Design meter micro architecture with digital engineer.Design and implement C model- Function logic: ACL, MPLS, VPWS/VPLS, flow table- Utility (ex. TCAM status resolution)Develop verification platform to easy and simplify to verify C model, RTL, FPGA, ASIC for software engineers and digital verification engineers.Design and Develop ACL module simulation.Develop tool by Python- For C model (ex. pipeline interface… Show more Design network switch IC packet pipe architecture.Design meter micro architecture with digital engineer.Design and implement C model- Function logic: ACL, MPLS, VPWS/VPLS, flow table- Utility (ex. TCAM status resolution)Develop verification platform to easy and simplify to verify C model, RTL, FPGA, ASIC for software engineers and digital verification engineers.Design and Develop ACL module simulation.Develop tool by Python- For C model (ex. pipeline interface generator)- latency report analysis- To reduce working performance (ex. command and SDK driver architecture auto generator)Implement SDK driver:- ACL, MPLS, meter, PHY driverDevelop automated test by TCL - ACL, MPLS, meterVerify network switch IC function - ACL, MPLS, meter, VLAN, L2Bring up network switch IC and PHY ICDevelop SDK SerDes driver with hardware engineersCustomer supportDevelop turnkey function-ACL, advance QoS Show less
