Drives best practices and methodologies in the following areas.：SPICE Modeling and Device CharacterizationESD / Latchup / Power MOSFETsTCADWork with cross-funcational teams (Marketing & Sales, PDK, IP, Process Intergration, Fab) to deliver world class Design Enablement Mixed-Signal/BCD/HV solutions to achieve first-time success for customers.

Managing the SPICE modeling team. Working with cross-functional teams (Technology Development / Device / Fab, pdk, Business Units, Customer Engineering / Field Applicaiton Engineers) and cross-sites modeling teams in execution of mainstream programs in Singapore to ensure timely delivery of models/pdks to meet customers' requirements. Focus areas include the following:- Automation/enhancement of data acquisition flow (IV, CV, RTN, Diode Reverse Recovery, pulsed IV, flicker noise, mismatch) to enhance productivity and efficiency - Driving new methodology and best practices in the characterization of analog, low noise and power devices (such as flicker noise, RTS noise, mismatch, pulsed IV, Diode recovery, Gate-charge, parasitic BJT models, mismatch, etc) as well as automation of QA flow- Develop methodology for comprehensive characterization and modeling of RTN (Random Telegraph Noise) in mainstream and advanced technology nodes. This includes the development of algorithm to automatically detect devices exhibiting RTN and generate RTN wafer map, modeling of RTN using commercial simulators (HSPICE and SPECTRE) in both time and frequency domains.-Develop Verilog-A models for Hall sensors- Working with cross-functional team in developing benchmark circuits for analog applications

Principal Member of Technical Staff (2014-2021)Senior Member of Technical Staff (2011-2014)Managing the SPICE characterization group & infrastructure. Focus areas include the following:- Automation/enhancement of data acquisition flow (IV, CV, RTN, Diode Reverse Recovery, pulsed, flicker noise, etc) to enhance productivity and efficiency - Driving new methodology and best practices in the characterization of power devices (such as pulsed IV, Diode recovery, Gate-charge, etc) - Develop methodology for comprehensive characterization and modeling of RTN (Random Telegraph Noise) in advanced technology nodes. This includes the development of algorithm to automatically detect devices exhibiting RTN and generate RTN wafer map, modeling of RTN using commercial simulators (HSPICE and SPECTRE) in both time and frequency domains.-Develop Verilog-A models for Hall sensors-Providing guidance to internal Device Team to enable modeling of MRAM using Verilog-A codes

Build the Singapore team and all infrastructures from scratch. Responsibilities include the following:1) Define IP development roadmap, plan project scope and schedule according to the business/engineering focus and requirements of the parent company. 2) Recruitment and training of engineering staff3) Ensure smooth operations and timely execution of all engineering projects. Liaise with Parent company (Vanguard International Semiconductor Corporation, Taiwan) and plan project scope and schedule according to the business/ engineering focus and requirements of the parent company.4) Define SOP (Standard Operating Procedures) for IC design, layout, device characterization and modeling; share/transfer SOP to parent company to enhance productivity and project effeciency.5) Customer support - help to provide quick response to resolve issues faced by customers (these issues could be related to device preformance, process, reliability, design, layout or modeling).Key focus areas of Singapore operations: Analog IP development (specifically for power-management applications using Vanguard's BCD technology platform), high-voltage/ power device characterization; modeling of BCD/HV/SOI devices, RC extraction for large-array power devices.

One of the co-founders of the company which specialised in RF/DC modeling, PDK (Process Design Kit) generation and RFIC design. Roles include the following:- Technical marketing- Engineering management- Negotiations with customers on IP licensing model and drafting of IP licensing agreement- Optimization of resources to ensure that all IC design and modeling projects are executed smoothly and delivered to customers in a timely and cost-effective manner.Responsible for driving new methodology and best practises in SPICE model extraction, PDK and device characterization.

Lead, train and supervise engineers in SPICE model extraction and device characterization.Responsible for driving new methodology and best practises in SPICE model extraction and device characterization.Frequent interactions with customers to address their needs concerning SPICE models.Plan for the roadmap of Device modeling group.Automation of measurement and modeling processes to improve work productivity.