Senthilkumar Murugesan
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Senthilkumar Murugesan Email & Phone Number

Director Physical Design Intel at Intel Corporation
Location: San Jose, California, United States 11 work roles 1 school
1 work email found @intel.com 2 phones found area 803 LinkedIn matched
✓ Verified Jul 2026 4 data sources Profile completeness 100%

Contact Signals · 1 work email · 2 phones

Work email s****@intel.com
Direct phone (803) ***-****
LinkedIn Profile matched
3 free lookups remaining · No credit card
Current company
Role
Director Physical Design Intel
Location
San Jose, California, United States
Company size

Who is Senthilkumar Murugesan? Overview

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Quick answer

Senthilkumar Murugesan is listed as Director Physical Design Intel at Intel Corporation, a with 10 employees, based in San Jose, California, United States. AeroLeads shows a work email signal at intel.com, phone signal with area code 803, and a matched LinkedIn profile for Senthilkumar Murugesan.

Senthilkumar Murugesan previously worked as Director Physical Design at Intel Corporation and Director Silicon Engineering at Groq. Senthilkumar Murugesan holds Master Of Science (Ms), Electrical Engineering from Southern Illinois University Edwardsville.

Company email context

Email format at Intel Corporation

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{first}.{last}@intel.com
89% confidence

AeroLeads found 1 current-domain work email signal for Senthilkumar Murugesan. Compare company email patterns before reaching out.

Profile bio

About Senthilkumar Murugesan

Senthilkumar Murugesan is a Director Physical Design Intel at Intel Corporation. They possess expertise in static timing analysis, physical design, timing closure, asic, soc and 3 more skills.

Listed skills include Static Timing Analysis, Physical Design, Timing Closure, Asic, and 4 others.

Current workplace

Senthilkumar Murugesan's current company

Company context helps verify the profile and gives searchers a useful next step.

Intel Corporation
Intel Corporation
Director Physical Design Intel
(408) 765-8080
Website
Employees
10
AeroLeads page
11 roles · 24 years

Senthilkumar Murugesan work experience

A career timeline built from the work history available for this profile.

Director Physical Design

Current

Santa Clara, California, Us

Apr 2022 - Present

Director Silicon Engineering

Mountain View, California, Us

Sep 2020 - Apr 2022

Sr Manager Gpu Physical Design

Amd
Jul 2016 - Sep 2020

Engineer

Cupertino, California, Us

Mar 2014 - Jul 2016

Soc Engineer

Calxeda
Dec 2013 - Dec 2013

Principal Engineer

Intersil

PD Lead for the mixed signal chipsPD methodology, Full chip Floorplanning (Wire bond with CUP in line pads), Power Grid Design, , P&R , Timing Constraints Development, STA/Timing Closure , Physical Verification.

Dec 2012 - Dec 2013

Staff Engineer

Samsung Semiconductor

PD STA Lead for the Mobile SOC's and ARM Server SOC's.Full Chip Timing Constraints Development, Hierarchical Timing Budgeting, Developing Full Chip/Block Clock tree specification, DDR/Memory Controller Timing Closure, Full Chip/Block Timing Closure, Timing ECO generation Methodology development.

Oct 2010 - Nov 2012

Mts

Amd

Santa Clara, California, Us

PD Lead for 100M+ instances GPU and AMD southbridge ChipsetPD Methodology, Full Chip Floorplanning, Power Grid Design (flip chip), Block pushdown, Chip Assembly, Setting up Full chip Hierarchical LVS flow, Power Analysis signoff, Physical Verification Signoff, Top/Block P&R.Top level repeater insertion/Analysis, Critical Hold Time PVT Analysis, Optimization/Signoff Timing corner selection, Full chip Timing Budgeting, Full Chip Timing Closure, Full chip P&R.

Dec 2004 - Oct 2010

Design Engineer

Centillium Communications

Worked as physical design engineer for the Central Office Design Group which designed ADSL chips.

Sep 2003 - Oct 2004

Design Engineer

Centillium Communications
2003 - 2004 ~1 yr
Team & coworkers

Colleagues at Intel Corporation

Other employees you can reach at intel.com. View company contacts for 10 employees →

1 education record

Senthilkumar Murugesan education

  • Southern Illinois University Edwardsville
    Southern Illinois University Edwardsville
    Electrical Engineering
FAQ

Frequently asked questions about Senthilkumar Murugesan

Quick answers generated from the profile data available on this page.

What company does Senthilkumar Murugesan work for?

Senthilkumar Murugesan works for Intel Corporation.

What is Senthilkumar Murugesan's role at Intel Corporation?

Senthilkumar Murugesan is listed as Director Physical Design Intel at Intel Corporation.

What is Senthilkumar Murugesan's email address?

AeroLeads has found 1 work email signal at @intel.com for Senthilkumar Murugesan at Intel Corporation.

What is Senthilkumar Murugesan's phone number?

AeroLeads has found 2 phone signal(s) with area code 803 for Senthilkumar Murugesan at Intel Corporation.

Where is Senthilkumar Murugesan based?

Senthilkumar Murugesan is based in San Jose, California, United States while working with Intel Corporation.

What companies has Senthilkumar Murugesan worked for?

Senthilkumar Murugesan has worked for Intel Corporation, Groq, Amd, Apple, and Calxeda.

Who are Senthilkumar Murugesan's colleagues at Intel Corporation?

Senthilkumar Murugesan's colleagues at Intel Corporation include Sabrina Wahid, Li Shao, Hongxin Zhang, Yong Quan Cheong, and Vinoo Srinivasan.

How can I contact Senthilkumar Murugesan?

You can use AeroLeads to view verified contact signals for Senthilkumar Murugesan at Intel Corporation, including work email, phone, and LinkedIn data when available.

What schools did Senthilkumar Murugesan attend?

Senthilkumar Murugesan holds Master Of Science (Ms), Electrical Engineering from Southern Illinois University Edwardsville.

What skills is Senthilkumar Murugesan known for?

Senthilkumar Murugesan is listed with skills including Static Timing Analysis, Physical Design, Timing Closure, Asic, Soc, Physical Verification, Timing Constraints Development, and Timing Budgeting.

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