Stephen Fischer Email and Phone Number
Stephen Fischer work email
- Valid
- Valid
- Valid
Stephen Fischer personal email
Stephen Fischer phone numbers
Love helping teams to accomplish great things together, developing new technologies from concept through end-to-end system architecture & design to shipping product, delivering innovative solutions of hardware and software components.Most of my career has been in early-stage startups (notably Violin Memory) or R&D organizations of large corporations (Lucent, Samsung). I tend to thrive in such innovative and fast-paced environments due to my strong work ethic and willingness to do whatever it takes, and abilities to learn quickly, solve challenging problems and adapt under difficult circumstances. I can also prioritize work items effectively under tight schedule/resource constraints to deliver incremental solutions.Building relationships and proactively collaborating across team and geographical boundaries really energizes me. I am also passionate about continually improving team/organization culture & employee engagement. While undertaking the Berkeley Engineering Leadership Professional Program, I was fortunate to connect with a few wonderful engineers who shared this passion, and complete a team project on a landscape study of Diversity, Inclusion and Belonging in the Workplace.I am seeking a new leadership opportunity where I can help a team to grow and succeed, to build something innovative together, and where there is alignment with my passions on team culture and employee engagement. I would be interested in a new technology or role, even something outside my core technical expertise and skills.Summary:Engineering Leader with 15+ years at VP, Sr. Director & Director level in startups & large corporations.• Accomplished manager of teams which consistently deliver innovative solutions of hardware & software.• Track record of delivering under tight schedules/budgets in complex and diverse business environments.• Passionate champion of team culture, employee engagement, and diversity, inclusion & belonging.• Energized by building strong relationships and proactively collaborating across team boundaries.Systems Architect with 25+ years R&D/product experience across storage & networking industries.• Successfully developed technologies from concept through end-to-end architecture & design to product.• Extensive experience integrating FPGAs and flash memory in scalable, high-performance systems.• Led team that developed SmartSSD, the first computational storage product from a major flash vendor.• Led team that built industry’s first high-performance all-flash array, leading to $280M+ revenue & IPO.• 15+ patents, 10+ publications.
Cpacket
View-
Director, Fpga EngineeringCpacket May 2021 - PresentMilpitas, Ca, UsLeading cPacket's FPGA team developing 100Gbps line rate packet brokering and network analytics solutions, enabling our customers to perform high-fidelity packet observation, advanced processing, and intelligent delivery to dashboards, security tools, and performance management tools.We are hiring!
-
Consultant, Systems EngineeringStealth Startup Dec 2020 - Apr 2021Systems engineering and FPGA consultant at an early-stage stealth-mode startup, working on a CXL device to enable composable architectures.
-
Senior Director, System ArchitectureSamsung Semiconductor, Inc. Mar 2019 - Aug 2020Joined Memory Solutions Lab, an advanced R&D organization for memory and data center technologies, to work on architectures and innovations for flash storage, and ultimately led a team to develop the SmartSSD computational storage product. Promoted to Senior Director, and recipient of Samsung Electronics President’s Award.• Managed team of 30+ engineers working on research and prototyping of innovative storage solutions, and productization of SmartSSD, a trailblazing computational storage device.• Led architecture, FPGA/software/firmware development and system integration/test for SmartSSD, enabling industry ramp of new intelligent storage solutions for near-data processing at data center scale.• Developed use cases and identified and built relationships with solution partners to create market opportunities, show performance benefits and demonstrate customer value for a new product class.• Established partnership with Xilinx, leading to business agreement, and coordinated 4-way collaboration between Samsung US/Korea and Xilinx US/India on co-development, test and debug of SmartSSD.• Built and managed relationships with leaders/teams in Korea, IP/university partners & lead customers.• Integrated with Product Planning team on customer requirements and external business engagements.• Recipient of Samsung Electronics President’s Award, a world-wide recognition for technical leadership.
-
Director And Principal EngineerSamsung Semiconductor, Inc. Apr 2018 - Feb 2019• Led team of 10+ FPGA and embedded software engineers working on SmartSSD proof-of-concept development and lab testing.
-
Principal Engineer, System ArchitectureSamsung Semiconductor, Inc. Apr 2016 - Mar 2018• Led technical effort to debug and stabilize FPGA data path on Ethernet SSD project resulting in successful demonstration of NVMe over fabric (NVMeoF).• Led architecture, feasibility study, performance characterization and vendor collaboration for AMD EPYC CPU based high-performance 1U storage server, to achieve industry-leading storage/network density.• Developed architecture and lab prototype of a 4-node high-availability storage platform with 24 dual-port NVMe SSDs and an adaptive PCIe switch fabric, demonstrating 100% performance after failover.
-
Vp Engineering, Systems And HardwarePi-Coral Mar 2015 - Oct 2015Joined start-up after ~2.5 years of operations, to lead systems and hardware organization to harden the company’s first generation peta-scale blade-based flash storage array for initial customer deployments and to help architect/develop next generation flash array products.• Led organization of HW and SW driver/diagnostics engineers developing a multi-petabyte flash array incorporating custom Intel motherboards and off-the-shelf flash modules running custom firmware.• Managed relationship with partner company in Taiwan to co-develop a custom Intel Haswell CPU based motherboard supporting PCIe hot-pluggable cartridges each containing multiple m.2 flash modules.• Led team to root cause hardware failures in the field and document failure analyses.• Led team to develop and implement tests for stressing the array’s hardware modules, in particular the power hold unit which incorporated 200+ supercapacitors.• Led hardware development project for second generation array, driving for improvement of architecture, design, cost, reliability and manufacturability over the first generation array.• Successfully integrated a newly-hired remote-site hardware team with the incumbent hardware team to form an overall collaborative and productive multi-site team.
-
Vp Engineering, Systems And Flash PlatformsViolin Memory Mar 2014 - Feb 2015Colorado Springs, Colorado, UsJoined on first day of funded operations to lead architecture and hardware/firmware development of a scalable memory technology, from concept to technology demo to DRAM array to four generations of flash array. Held various leadership roles as company grew to 400+ employees and $100M/year revenue.* Led organization of 40+ hardware engineers, FPGA design/verification engineers, embedded software engineers and flash controller firmware engineers developing Violin’s fourth generation flash array.* Managed teams across multiple geographical areas, located in CA, NJ, NY, PA and in the UK, bringing together previously disjoint teams to collaborate and work effectively together.* Led fourth-gen flash controller FPGA through final year of development/test, to finally reach production after the project had experienced multiple setbacks during prior three years.* Worked with PM and advanced technology teams to define product direction and next-gen architectures, and to architect acceleration of data management SW features using FPGAs.* Participated in numerous customer meetings, presenting product plans and discussing customer requirements/issues, with notable success in turning around a particularly disgruntled customer.* Coordinated technical relationship with flash vendor Toshiba, working closely on aligning flash roadmap with product roadmap, as well as on flash characterization and failure analysis.* Helped optimize HW budget, overseeing successful effort to reduce tools expenses by $250K/year. -
Senior Director Of EngineeringViolin Memory May 2013 - Feb 2014Colorado Springs, Colorado, Us• Led team of 10+ hardware and FPGA engineers to productize a 19nm flash memory module, resulting in a substantial increase in product profit margins.• Led FPGA architecture, development and test of the non-disruptive array upgrade feature.• Invented, architected and led development of a custom data redundancy/reliability feature resulting in a reduction in data path related customer escalations.• Trained sustaining engineers to take over customer escalations related to FPGA data path.• Hands-on experience with test and characterization of multiple generations of flash from multi vendors.
-
Director Of Hardware EngineeringViolin Memory Dec 2005 - Apr 2013Colorado Springs, Colorado, Us• Built and led a high caliber HW/FPGA team to architect and design Violin’s DRAM array, first and second generation flash arrays, and flash/RAID modules for third-gen flash array.• Managed SW, QA, release-eng and manufacturing during periods of leadership transition.• Prioritized tasks to deliver high quality products/releases on tight schedules with limited resources.• Hands-on debug of complex QA issues, and resolution of customer data path escalations.• Negotiated with vendors for contracts/pricing on hardware components and tools.
-
Director Of Architecture And Hardware EngineeringUtstarcom Feb 2005 - Jul 2005San Jose, California, Us• Led the hardware/FPGA team to architect and develop a 400 Gbps multi-protocol packet switch.• Architecture for FPGA based packet processing engines supporting MPLS, IPv4/IPv6 and Ethernet with advanced filtering, policing, shaping and queueing features for QoS.• Verification of inter-connected FPGAs and ASICs using VHDL testbench and python scripts.• Developed methodology and scripts for automation of FPGA build/simulation, FPGA pin assignments, code generation for packet/memory structures and PCB netlist verification. -
Principal EngineerUtstarcom May 2003 - Jan 2005San Jose, California, Us
-
Senior Hardware EngineerXebeo Communications Oct 2000 - May 2003Joined early stage startup as first non-founder HW engineer, to work on FPGA architecture/design for high speed packet processing. Received multiple promotions with expanded leadership responsibilities.Xebeo Communications was acquired by UTStarcom.
-
Principal EngineerBroadspider Networks May 2000 - Oct 2000Joined early stage startup as one of first four non-founding engineers to help architect content distribution and switching infrastructure for video-on-demand services.• Hardware architecture for next generation multi-service, broadband access equipment.
-
Member Of Techical StaffLucent Technologies Dec 1997 - May 2000Espoo, Southern Finland, FiJoined a startup-like project to work on architecture/design for an IP router with advanced QoS features.• Architecture for next generation OC192 SONET/IP/MPLS multi-service switching product.• FPGA design, verification and lab debug for scheduler FPGA and switch fabric interface FPGAs. -
Postdoctoral Research EngineerAustralian Telecommunications Research Institute Nov 1995 - Nov 1997Research on multiple access control protocols for indoor wireless ATM LANs.
Stephen Fischer Skills
Stephen Fischer Education Details
-
Curtin UniversityElectrical Engineering -
The University Of Western AustraliaElectrical And Electronics Engineering
Frequently Asked Questions about Stephen Fischer
What company does Stephen Fischer work for?
Stephen Fischer works for Cpacket
What is Stephen Fischer's role at the current company?
Stephen Fischer's current role is Director, FPGA Engineering at cPacket | Engineering Leader | Systems Architect | Culture Champion | Innovator | Positive Leader | Proactive Collaborator | PhD.
What is Stephen Fischer's email address?
Stephen Fischer's email address is sf****@****eee.org
What is Stephen Fischer's direct phone number?
Stephen Fischer's direct phone number is +165039*****
What schools did Stephen Fischer attend?
Stephen Fischer attended Curtin University, The University Of Western Australia.
What skills is Stephen Fischer known for?
Stephen Fischer has skills like Storage, Hardware, Ethernet, Embedded Systems, Fpga, Asic, Wireless, Distributed Systems, Linux, System Architecture, Hardware Architecture, Mpls.
Free Chrome Extension
Find emails, phones & company data instantly
Aero Online
Your AI prospecting assistant
Select data to include:
0 records × $0.02 per record
Download 750 million emails and 100 million phone numbers
Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.
Start your free trial