Simhi Gerner Email & Phone Number

Chip design engineer with experience in ASIC design flow including micro-architecture and logic design - Verilog/SystemVerilog. Working closely with verification and PD teamsPlanning and implementing a new IP from scratch.Experience in formal verification.Experience in tools and automation - python/perl/shell scripts.Knowledge in C/C++.I am charmed by the variety of options that are possible to do in Linux (sed, awk, grep, vim, regex , etc). I am greeting every challenge that I am faced with and trying to solve it in the optimal way. My favorite puzzle is the logic riddles, surprise me with hard one.eager to learn new things.

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  Bar-Ilan University

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