Shaik Mathin Email & Phone Number

As a trained Electronic Engineering Fresher having Knowledge in Digital design and Semiconductor Technology along with a strong Academic Background. I am eager to contribute my skills and knowledge to a dynamic Engineering Team.EDA TOOLS:Mentor Graphics- VCS compiler (for simulation)Design Compiler (from Synopsys for synthesis)TECHNICAL SKILLS:HDL: VerilogHVL: System Verilog Verification Methodologies: Constraint Random Coverage DrivenVerification Assertion Based Verification - SVA Programming Language: C, C++TB Methodology: UVM.Operating System -Linux, Windows Core skills: RTL Design, FSM Design. Simulation, Functional coverage. Synthesis, Code coverage.