Shailesh Shah Email and Phone Number
* 15+ years of proven track record working in all phases of SoC/ASIC product development cycle.* Core member of product development and integration teams with history of successfully delivering more than 20+ semiconductor SOCs for mobile and consumer electronics industry. * SOC design complexity include multi-million gates for various technology nodes from 10nm to 80nm.* Experience in high-speed/low-power complex ASIC design, architecture and pre/post silicon verification. Designs developed include clock/reset/power controls and complex video/display/graphics technologies from specification to RTL design/verification to chip bring-up.* Successfully led integration of complete multi-media sub-system involving multiple cross-functional IP development teams from multiple global sites. * Extensive knowledge in Synthesis, STA, Formal Verification, CDC, PLDRC, Low Power checks.- Able to work on multiple projects with diverse teams spread across multiple global sites. - Flexible to act as a leader, team player or as a significant individual contributor.- Enthusiastic to learn new things and keen to explore new areas.
Qualcomm
View- Website:
- qualcomm.com
- Employees:
- 37431
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Principal Asic Design EngineerQualcomm Nov 2019 - PresentSan Diego, California, United States
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Senior Staff Asic Design EngineerQualcomm Nov 2011 - Nov 2019San Diego, UsaCore member of Camera subsystem, delivered in multiple generations of QCTs ‘Snapdragon’ processors (S8xx, S6xx, S4xx, S2xx)• Led architecture and design of clocks, reset and power controls of camera subsystem. Develop technical diagrams, hardware programing guide used by Verification & SW/FW teams. • Present and participate in regular design and documentation review.• Work closely with SoC, Verification, Physical Design, Implementation and SW teams during all phases of design from RTL to silicon bring-up.• Developed IPs for bandwidth management (QMIP) and unauthorized overclocking (Frequency Limiter) from specification to architecture, design and pre-post silicon bring up.• Successfully led integration of complete multi-media sub-system involving multiple cross-functional IP development teams from multiple global sites. IPs integrated also includes Analog IP such as PLL, PHY, Droop Detector.Tools used:Modelsim/VCS/Novas/ius, Debussy, Synopsys DC/DCG/DCT, Primetime, 0-in CDC, Spyglass, Conformal Low-power, Formality.Languages: Verilog, System Verilog, TCL
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Principal Asic Design EngineerBroadcom (Dtv Bu, Formerly Amd/Ati) Oct 2008 - Oct 2011Toronto, CanadaDeveloped advanced video and picture quality improvement IPs in RTL (starting from quantized C model/algorithm) for Broadcom BCM35xxx Digital TV SoCs.• IPs designed and developed include – Video Image Sharpening, Contrast Enhancement, 2Dto3D Conversion, 3D Depth Control, memory controller interface• Superblock/Tile lead for 2 layout blocks. Responsibilities included constraint generation, sysnthesis, formal verification, timing closure, ECOs, netlist transfer between frontend and backend. -
Mts Asic Design Engineer (Dtv Bu, Formerly Ati)Amd Oct 2006 - Oct 2008Toronto, Canada AreaResponsible for display IP design (starting from quantized C model/algorithm) and display sub system integration of Xilleon DTV SOCs.• IPs designed and developed include – Motion Estimation & Compensation, Deinterlacing, Scaling, Colour Management• Block level and display sub-system Synthesis, CDC analysis, Lint checks - Constraints and netlist generation and validation - STA, ECO handling and timing closure - PD & IP interaction - cross-site collaboration. -
Asic Design EngineerAti Technologies Inc Jan 2000 - Oct 2006Toronto, Canada
Shailesh Shah Education Details
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Electrical Engineering -
Electronics
Frequently Asked Questions about Shailesh Shah
What company does Shailesh Shah work for?
Shailesh Shah works for Qualcomm
What is Shailesh Shah's role at the current company?
Shailesh Shah's current role is Principal ASIC Design Engineer at Qualcomm.
What schools did Shailesh Shah attend?
Shailesh Shah attended Concordia University, Dharmsinh Desai University.
Who are Shailesh Shah's colleagues?
Shailesh Shah's colleagues are Tyson Dethlefsen, Florian Schmid, Murugadoss S P, Mehul Shah, Francesco Falconieri, Aman Kumar Sharma, Souveek Pradhan.
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Shailesh Shah
Board Director; Startup Advisor; Principal Investor; Retired Global Chief Risk Officer In Financial ServicesPhiladelphia, Pa -
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