SoC architecture and design for ARM based Application Processor and Tensilica DSP based Dual-mode (PLC & 802.15.4g) Communication Processor

Led a SoC architecture/design team working on:Spec-in SoC project pre-sale support and execution including spec definition, logic design, integration, verification, FE implementation and prototyping;In-house DSP product line of ZSP verification at both core/subsystem level;Video IP plug-in component development for Decompression and Tile-to-Raster scan Convertion;As OpenPower Foundation membership, CAPI based video encoding accelerator application;

Worked on R&D of HEVC/H.265 encoder & decoder IP. Recruited and led a team for: 1) micro-architecture definition and logic design for in-house VPU/MCU and various general system blocks. 2) in charge of UVM based block level verification, combined verification and full-IP level verification. 3) built up the SOC platform on Virtex 7 FPGA for functional/performance validation and demonstration of designed IP;

Led and managed the Shanghai CPU Design team to work on the development of Marvell in-house ARM v6/v7 compatible processors, including micro-architecture definition, RTL implementation, synthesis/timing, verification, performance tuning and FPGA prototyping/debugging etc.