Ramya Shankar Email & Phone Number

Mountain View, Ca, Us

Santa Clara, California, United States

San Jose, California, United States

DIRECTOR – SILICON ONE PRODUCTIZATION (2018 – Present)SENIOR MANAGER (2018 – 2021)Founding team member and intrapreneur tapped to lead ASICs from startup acquisition to production. Directly oversaw all technical operations activities post tape-out (test, product, assembly, foundry, reliability, sustain engineering) for four generations of ASICs scaling to >$xB+ in revenue. IMPACTInstrumental in setting up a foundational framework of milestones, processes, and metrics for New Product Introduction and end-to-end quality and engineering productivity management (supplier quality, manufacturing and test quality, customer quality) and capital and operational spend management ($xxxM). Managed high-volume scale through semiconductor shortages by qualifying alternate sources (~10+ routes per product), managing capacity planning and allocation, and optimizing manufacturing processes. Scaled a global, multidisciplinary team to ~100 members. Established site strategy and hired the first employees in four countries, building a cohesive team around these initial hires.

San Jose, California, United States

Promoted to manage merchant silicon quality during period of strong focus on off-the-shelf silicon. Developed and led team of eight engineers focused on component, supplier and product quality for ~$1.5B spend covering networking silicon, PHYs, FPGAs, and MCUs.IMPACTCustomized previous innovative methodologies (developed as Component Engineer) for time-to-quality volume and cost of quality management to scale across large and diverse supplier base. Created a robust supplier incubation framework for startups to scale successfully. Expanded scope to cover DSPs and drivers for optics, enabling merchant silicon startups with differentiated design to scale to volume meeting quality requirements. Resolved yield and quality bottlenecks to release three generations of products to production over a three-year period.

San Francisco Bay Area

Brought in to drive new technologies and quality excellence to reduce cost of quality at the same time. Managed supplier quality, interacting with every major Semiconductor supplier worldwide, as well as setting up methodologies for fledging startups. Managed supplier quality for~$1B spend. IMPACTDrove supplier planning teams to align with Cisco NPI product ramp plans and resolved yield and burn-in bottlenecks to meet product timelines – meeting On-Time-Ship metric and Time-To-Market. Awarded Cisco’s Quality Innovation award (2014) for pioneering new methodology that demonstrated TTQ and TTM improvements of up to 50% via early partnership with suppliers and Cisco engineering teams.

Design and verification of digital ASICS including DFT insertion and verification. Partnered with customers to understand requirements and co-ordinate design and verification efforts, spanning Comit and customer sites.

Hillsboro, Oregon, United States

As one of two people chosen by Intel from Master of Science program at University of Florida, brought in as part of a seven-person team to write tools and automate workflow created to support the on-time delivery of cutting-edge technologies. Collaborated cross-functionally on process roadmap with process and circuit engineers.IMPACTPerformed device parameter extraction for creating Process Design Kit (PDK) using Intel’s proprietary compact models for 32nm node. Designed and maintained tools for model-data validation and developed a fully automated test bench optimizing turn-around time for fine tuning process and device parameters. Boosted team productivity by 30%.

Designed and developed UI controllers for set top boxes. Developed brand new feature for “time shift buffering” or live pause showcased at CES (Consumer Electronics Show). Technology acquired semiconductor.

Master Of Science - Ms, Electrical Engineering

MS in EE with a focus on device physics Thesis on GaN nanowires Monte Carlo simulations for device characterization

Bachelor Of Engineering - Be, Electrical, Electronics And Communications Engineering