Vignesh Shanmugam Email & Phone Number

Pittsburgh, Pa, Us

Working as staff engineer in the Onboard platform - Networking team leading the time synchronization (IEEE802.1AS/gPTP - Automotive Profile) related topics for the entire vehicle network. ResponsibilitiesAs the lead time synchronization expert, defined the system wide time accuracy requirements and method to implement time volatility detection mechanisms as a safety requirement for each Automotive grade Ethernet devices on the vehicle network.Understood the gaps and documented/presented the short term and long term roadmap for the time synchronization tasks to the management and the team. Solved critical gPTP synchronization issues seen in the sensors like Radars, FPGAs & CPUs by identifying the root cause and analyzing as well as fixing the issues.Identified one of the Ethernet switches used is not compliant to Automotive profile gPTP. Implemented the FW changes into this Ethernet switch solved many long pending time synchronization issues in the vehicle network.Optimized part of the network by changing the network configurations that improved the overall performance of the network.Work is in progress in porting all the switch configuration and upgrading to the new switch configuration tool followed by adding TCAM rules to block unnecessary multicast traffic to the sensors that will improve the sensor performance.Work is in progress with the design and implementation of gPTP failure detection mechanism to meet the safety requirement for the autonomous vehicle operation.Work is in progress with several gPTP synchronization & performance issues identified in the network.

Pittsburgh, Pa, Us

Munich, De

Working as development engineer on Ruggedcom Layer 2 Industrial switches, predominantly on Precision Time Protocol (PTP/IEEE1588). Responsibilities• As PTP Module owner, design, develop and maintain the module.• Reorganized the entire PTP Stack (C++) to solve complex infrastructural issues and to ease new implementations and enhancements. • Two Patent disclosures on PTP has been filed and accepted.• Expert level knowledge in IEEE1588v2, IEEE1588v2.1, PTP with HSR/PRP IEC62439-2 and various Power (IEEE C37.238) and Utility (IEC 61850-9-3) PTP Profiles.• Experience in leading the project, mentoring, and directing the team in bug fixing, code reviewing.• Responsible for HW Driver & wrapper development and maintenance. Extensive experience in handling many hardware issues related to PTP in the SW.• Involved everyday with Quality Engineering Team and Hardware team to mitigate issues and guide for any questions other team has related to Time Sync.• Responsible to provide FEMA (Failure mode and Effects Analysis) for the new products in the design stage.• Experience working with GPS Receiver module used for Device Time Synchronization.

San Jose, Ca, Us

Worked as Firmware Development Engineer on the product - PCIe based Converged Network Adapter (CNA) – Channel Adapter.Responsibilities• Implemented RSS algorithm in EP to support RX filtering of traffic based on packet header information.• Module level ownership on data plane implementation of protocol RoCE (Remote DMA or RDMA over Converged Ethernet) RX path. • Responsible for reviewing any code changes or bug fixes made in RoCE RX path implemented both in C & Assembly language. • Effectively contributed in EP firmware code-optimization to improve performance in RoCE RX Path.• Possess hands on knowledge in Client/Server model network programming in RoCE - very similar to socket programming in TCP/IP.• Hands on experience in using I2C gizmo debugging tool, Finisar (Xgig Analyser) Packet Capturing tool, gdb debuggers on live machines.

Espoo, Southern Finland, Fi

Joined as a fresher to be part of worldwide MAINT team for Alcatel-Lucent’s flagship product Broadband Switches “ISAM” (Integrated Services Access Multiplexer) DSLAM (Digital Subscriber Link Access Multiplexer), I worked onsite and off-shore to provide customer support to triage, debug field issues and to implement enhancement requests in Intel Based Network Processor (NP) used in ISAM. Responsibilities• Designed and developed an entirely new layer 2 forwarding model called Stacked IBridge forwarding model in Network Processor Intel IXP2350 chip using C & Assembly language.• Implemented an enhancement feature called IPv6 Access Control List (ACL) – packet filtering mechanism in IXP2350 NP (data plane implementation in Assembly Language & hardware wrapper development in C).• Implemented ‘Fast Path Level Aware Filtering – CFM’ feature in IXP2350 NP used in line termination card of ISAM using Assembly & C. • Possess knowledge on using Multi probe JTAG debugger on live broadband switches in customer premises, Network Traffic Generation Tools like Spirent Test Centers, Intel IXP2350 SDK.

Espoo, Southern Finland, Fi

Joined as a fresher to be part of worldwide MAINT team for Alcatel-Lucent’s flagship product Broadband Switches “ISAM” (Integrated Services Access Multiplexer) DSLAM (Digital Subscriber Link Access Multiplexer), I worked onsite and off-shore to provide customer support to triage, debug field issues and to implement enhancement requests in Intel Based Network Processor (NP) used in ISAM. Responsibilities• Designed and developed an entirely new layer 2 forwarding model called Stacked IBridge forwarding model in Network Processor Intel IXP2350 chip using C & Assembly language.• Implemented an enhancement feature called IPv6 Access Control List (ACL) – packet filtering mechanism in IXP2350 NP (data plane implementation in Assembly Language & hardware wrapper development in C).• Implemented ‘Fast Path Level Aware Filtering – CFM’ feature in IXP2350 NP used in line termination card of ISAM using Assembly & C. • Possess knowledge on using Multi probe JTAG debugger on live broadband switches in customer premises, Network Traffic Generation Tools like Spirent Test Centers, Intel IXP2350 SDK.

Bachelor Of Engineering (B.E.), Electronics And Communications Engineering

Diploma, Electronics And Communication Engineering