Senior Hardware Engineer
CurrentComplete responsibility and ownership of internal HW platform from FDD to TapeOut and SOD to CSWorked on Schematic correctness, layout implementation, accurate Rev-A BOM releases.Simulation, layout, Mechanical coordination with cross functional teams teams. PDN and PMIC simulations executions.Working on Simulation Signoffs from PDN, PMIC, Serdes PSIG leads.Complete performance validation of the HW with respect to the latest builds.