Soc Design Engineer
CurrentWorking on Intel Xeon 7 "Diamond Rapids" design on 18A technology node.
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Shreesh Kulkarni is listed as SoC Design Engineer @Intel | LFX'24 @RISC-V International @OpenHWGroup | Individual Community Member and Open-Source Contributor @RISC-V International | BTech EEE @ NITK Surathkal at Intel Corporation, a company with 133841 employees, based in Bengaluru, Karnataka, India. AeroLeads shows a matched LinkedIn profile for Shreesh Kulkarni.
Shreesh Kulkarni previously worked as SoC Design Engineer at Intel Corporation and Open Source Developer @ RISC-V International at The Linux Foundation. Shreesh Kulkarni holds Bachelor Of Technology - Btech, Electrical And Electronics Engineering, 8.81 Cgpa from National Institute Of Technology Karnataka.
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I'm Shreesh, a semiconductor and microarchitecture enthusiast currently pursuing my career as a SoC Design Engineer at Intel.I'm a VLSI and CPU microarchitecture and logic design enthusiast. I have a year of technical experience under my belt in this domain across various open-source organizations. I'm a massive advocate of the RISC-V ISA. I am a lifelong community member and open-source developer at RISC-V International, the home of the open-source ISA. I believe RISC-V is the future of open-source computing.I have worked with multiple open-source RISC-V organizations throughout my academic tenure, most notably Redwood EDA and the OpenHW Group.Through my various contributions to the amazing open-source organizations which adopt the RISC-V ISA, I hope to inspire young enthusiasts to learn about RISC-V and it's vibrant community and also learn a lot about the ever-rising realm of Computer Architecture and Digital Logic.
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Bengaluru, Karnataka, India
Working on Intel Xeon 7 "Diamond Rapids" design on 18A technology node.
Ported OpenHW's CORE-V Family's CV-Wally's Coremark to RV32 and improved Coremark Score/MHz by 9 percent compared to RV64 making Wally the fastest CPU core in the OpenHW family.Added support for Quad Precision Floating Point to RISC-V ISA Coverage and RISC-V Compatibility TestGenerator tools and ported it to Wally for functional coverage and.
Massachusetts, United States
Developing Compressed Instructions support for WARP-V(RV32IC). Formally verifying custom RISC-V cores using riscv-formal framework by YosysHQ,
Open source contributor. Contributed to the RISC-V Software SIG and RISC-V Architecture SIG. Member of the Privileged and Unprivileged Architecture Task Group.
Bengaluru, Karnataka, India
Actively contributed to developing an efficient Embedded System to log data consistently from BLDC motors which are used extensively in electric vehicles.
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Ross Gilroy
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Ankita Bat
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Dwi Yanto
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Joannie Fu
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Mohamad Azrin Abdul Halim
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Susmitha Mohan
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Renjini J.
Colleague at Intel CorporationSacramento, California, United States, United States
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Quick answers generated from the profile data available on this page.
Shreesh Kulkarni works for Intel Corporation.
Shreesh Kulkarni is listed as SoC Design Engineer @Intel | LFX'24 @RISC-V International @OpenHWGroup | Individual Community Member and Open-Source Contributor @RISC-V International | BTech EEE @ NITK Surathkal at Intel Corporation.
Shreesh Kulkarni is based in Bengaluru, Karnataka, India while working with Intel Corporation.
Shreesh Kulkarni has worked for Intel Corporation, The Linux Foundation, Openhw Group, Redwood Eda, Llc, and Risc-V International.
Shreesh Kulkarni's colleagues at Intel Corporation include Ross Gilroy, Ooi Zi Sheng, Anthony Wong, Leena Jaibhave Khochare, and Ankita Bat.
You can use AeroLeads to view verified contact signals for Shreesh Kulkarni at Intel Corporation, including work email, phone, and LinkedIn data when available.
Shreesh Kulkarni holds Bachelor Of Technology - Btech, Electrical And Electronics Engineering, 8.81 Cgpa from National Institute Of Technology Karnataka.
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