Shuhaib Pm Email & Phone Number

India

RTL design and verification for custom Architecture Microprocessor and RAM modules.FW for Microprocessor and Intel IP.Synthesis and validation.IP Implementation, along with meticulous analysis and debugging.Proficient in Analyzing and Debugging FW and RTL code Proficient in handling simulation tools for complex designs Experience with Verilog, System Verilog, C and C++Experience in FPGA-based Nand Flash SSDs, PHY module, AXI protocols, Multiclock asynchronous… Show more RTL design and verification for custom Architecture Microprocessor and RAM modules.FW for Microprocessor and Intel IP.Synthesis and validation.IP Implementation, along with meticulous analysis and debugging.Proficient in Analyzing and Debugging FW and RTL code Proficient in handling simulation tools for complex designs Experience with Verilog, System Verilog, C and C++Experience in FPGA-based Nand Flash SSDs, PHY module, AXI protocols, Multiclock asynchronous systems.Proficient in HW development tools and IDE for Xilinx (Vivado, Vitis) and Altera (Quartus Prime, Eclipse), Hardware testing using ILA and STA.Synthesis and Implementation of verified RTL design in Intel Stratix 10 series FPGAsExperience in Board testing and Firmware for testing custom RTL RAM modules and protocol conversion IP's.Exposure in Validation for board testing and debugging.Exposure in Timing Analysis and Timing Constraint and Timing closure.Exposure to scripting tools - TCL, Shell, and Makefile. Show less

India

Interned at smartIOPS where high-performance SSDs are developed.Had hands-on experience in FPGA builds and their tools, RTL design using Verilog. RISC V architecture in FPGA.