Principal Engineer
CurrentProvide 40G/100G, PAM4 SerDes signal integrity design layout guidelines, electrical models of silicon, package, and PCB to develop engineers, application engineers, and customers for product success.* Design, simulate, model, test and verify high frequency, high speed, silicon, package, and PCB components and interfaces. Develop, document high speed, high frequency models and libraries of silicon, packages, PCB traces and components. * Review, analysis, and modify silicon, package, and PCB layout to improve signal integrity and power integrity properties.* Support product tests and verifications in design, analysis and validation of high frequency, high speed cables, RLC components, test sockets, switches, connectors, PCB trace via transitions and interfaces.* Work with cross-functional teams of silicon, package, PCB, testing, application, as well as end customers for product success. Modeling and design support continues from concept stage, through products design, characterization, verification, and qualification with continuing support through product cycles.
