Sonu Singhal Email and Phone Number

Throughout my carrier at Analog Devices , i got the chance to Learn, Collaborate and Innovate in below SoC design activities:RTL Design Integration and Development.RTL Validation Techniques (LINT, CDC , RDC)Logical Equivalence Checks (LEC) for incremental modified RTL Design.Design Verification - Block level and Integration DV ( Test Plan Creation, Directed Test Vectors and scenarios, UVM Based checks, Formal Verification , Full chip regression cleanup , Performance DV ,Code Coverage , etc.)Gate Level Simulations and Debugs. Static Timing Analysis (Chip-Top timing Analysis, TCL Scripting , SDF generation, Leakage recovery , Hands on experience on ECO flow , Constraints Feedback , AC-Timing Closure for various High Speed peripherals )Silicon Support (Test-case creation for ATE characterisation and assisted with required debug and analysis to sign off on datasheet numbers.)

Worked on a project “ Protocol Analyzer / Jammer “ based on PCIE .

Worked on GPS using STM32 micro controller in “Data and Radio Systems” team .